参数资料
型号: A1442EEWLT-P
厂商: Allegro Microsystems Inc
文件页数: 7/9页
文件大小: 0K
描述: IC DC MOTOR DRIVER LV 6-MLP
产品变化通告: Pre-EOL Notice 07/Feb/2012
标准包装: 1
应用: DC 电机驱动器,无刷(BLDC)
输出数: 1
电流 - 输出: 400mA
电源电压: 2 V ~ 4.2 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 6-XFDFN 裸露焊盘
供应商设备封装: 6-MLP/DFN 裸露焊盘(1.5x2)
包装: 标准包装
产品目录页面: 1140 (CN2011-ZH PDF)
其它名称: 620-1210-6
Low Voltage Full Bridge Brushless DC Motor Driver
A1442
with Hall Commutation and Soft Switching,
and Reverse Battery, Short Circuit, and Thermal Shutdown Protection
Power Derating
The device must be operated below the maximum junction tem-
Given:
perature of the device, T J (max). Under certain combinations of
peak conditions, reliable operation may require derating supplied
power or improving the heat dissipation properties of the appli-
cation. This section presents a procedure for correlating factors
P D = V IN × I IN ,
Δ T = P D × R θ JA , and
T J = T A + Δ T
(1)
(2)
(3)
affecting operating T J . (Thermal data is also available on the
Allegro MicroSystems Web site.) The package thermal resistance,
R θ JA , is a figure of merit summarizing the ability of the appli-
cation and the device to dissipate heat from the junction (die),
through all paths to the ambient air. Its primary component is the
effective thermal conductivity, K, of the printed circuit board,
including adjacent devices and traces. Radiation from the die
through the device case, R θ JC , is relatively small component of
R θ JA . Ambient air temperature, TA , and air motion are significant
external factors, damped by overmolding. The effect of varying
power levels (power dissipation, P D ) can be estimated. The fol-
lowing formulas represent the fundamental relationships used to
estimate T J at given levels of P D .
V BATT
For a load of 30 Ω , given common conditions such as: T A = 25°C,
V DD = 3 V, I DD = 83 mA, V L = 2.43 V, I L = 81 mA and R θ JA =
250 °C/W, then:
P D = V DD × I DD – V L I L
= 3 V × 83 mA – 2.43 V × 81 mA = 52.17 mW ,
Δ T = P D × R θ JA
= 52.17 mW × 250 °C/W = 13°C , and
T J = T A + Δ T = 25°C + 13°C = 38°C
A worst-case estimate, P D (max), represents the maximum allow-
able power level, without exceeding T J (max), at a selected R θ JA
and T A .
I DD
VDD
VOUT1
I L
System Logic
Control
I/O
C BYP
0.1 μ F
SLEEP
A1442
VOUT2
M
NC
Figure 4. Typical application showing current paths
GND
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6
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