4.0
A28F400BR-T/B
23
ADVANCE INFORMATION
ABSOLUTE MAXIMUM
RATINGS*
Operating Temperature
During Read...........................
–40°C to +125°C
During Block Erase
and Word/Byte Program.........–40°C to +125°C
Temperature Under Bias........–40°C to +125°C
Storage Temperature....................–65°C to +125°C
Voltage on Any Pin
(except V
CC
, V
PP
, A
9
and RP#)
with Respect to GND..............–2.0V to +7.0V
(1)
Voltage on Pin RP# or Pin A
9
with Respect to GND......... –2.0V to +13.5V
(1,2)
V
PP
Program Voltage with Respect
to GND during Block Erase
and Word/Byte Program.... –2.0V to +14.0V
(1,2)
V
CC
Supply Voltage
with Respect to GND..............–2.0V to +7.0V
(1)
Output Short Circuit Current ...................100 mA
(3)
NOTICE: This datasheet contains information on products in
the sampling and initial production phases of development.
The specifications are subject to change without notice.
Verify with your local Intel Sales office that you have the
latest datasheet before finalizing a design.
* WARNING: Stressing the device beyond the "Absolute
Maximum Ratings" may cause permanent damage. These
are stress ratings only. Operation beyond the "Operating
Conditions" is not recommended and extended exposure
beyond the "Operating Conditions" may effect device
reliability.
NOTES:
1.
Minimum DC voltage is
–0.5V on input/output pins.
During transitions, this level may undershoot to –2.0V
for periods
<20 ns. Maximum DC voltage on input/output pins is
V
CC
+ 0.5V which, during transitions, may overshoot to
V
CC
+ 2.0V for periods <20 ns.
Maximum DC voltage on V
PP
may overshoot to +14.0V
for periods <20 ns. Maximum DC voltage on RP# or A
9
may overshoot to 13.5V for periods <20 ns.
Output shorted for no more than one second. No more
than one output shorted at a time.
2.
3
.
5.0
OPERATING CONDITIONS
Table 9. Temperature and V
CC
Operating Conditions
Parameter
Symbol
Notes
Min
Max
Units
T
A
Operating Temperature
–40
+125
°C
V
CC
V
CC
Supply Voltage (10%)
4.50
5.50
Volts
5.1
Applying V
CC
Voltages
If the V
CC
ramp rate is greater than 0.01 V/μs, a
delay of 2 μs is required before any device
operation can be initiated. This includes array or
status read, command writes and program or erase
operations. The 2 μs are measure beginning from
the time V
CC
reaches V
CCMIN
(4.5V). This delay is
not tied to the operation of the reset input. It is
recommended that the device be held in reset (RP#
= GND) while V
CC
is less than V
CCMIN
.
If the V
CC
ramp rate is less than 0.01 V/μs, no delay
is required once V
CC
has reached V
CCMIN
.