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| 型号： | A28F400BX-B |
| 厂商： | Intel Corp. |
| 英文描述： | 4-MBIT (512K x8) Boot Block Flash Memory(4兆位(512K x8) 引导块闪速存储器) |
| 中文描述： | 4兆位（为512k × 8）开机区块快闪记忆体（4兆位（为512k × 8）引导块闪速存储器） |
| 文件页数： | 12/34页 |
| 文件大小： | 411K |
| 代理商： | A28F400BX-B |
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A28F400BX-T/B
3.2.1.1 Output Control
With OE
Y
at logic-high level (V
IH
), the output from
the device is disabled and data input/output pins
(DQ
[
0:15
]
or DQ
[
0:7
]
are tri-stated. Data input is
then controlled by WE
Y
.
3.2.1.2 Input Control
With WE
Y
at logic-high level (V
IH
), input to the de-
vice is disabled. Data Input/Output pins (DQ
[
0:15
]
or DQ
[
0:7
]
) are controlled by OE
Y
.
3.2.2 INTELLIGENT IDENTIFIERS
The manufacturer and device codes are read via the
CUI or by taking the A
9
pin to 12V. Writing 90H to
the CUI places the device into Intelligent Identifier
read mode. A read of location 00000H outputs the
manufacturer’s identification code, 0089H, and loca-
tion 00001H outputs the device code; 4470H for
A28F400BX-T, 4471H for A28F400BX-B. When
BYTE
Y
is at a logic low only the lower byte of the
above signatures is read and DQ
15
/A
b
1
is a ‘‘don’t
care’’ during Intelligent Identifier mode. A read array
command must be written to the memory to return to
the read array mode.
3.3 Write Operations
Commands are written to the CUI using standard mi-
croprocessor write timings. The CUI serves as the
interface between the microprocessor and the inter-
nal chip operation. The CUI can decipher Read Ar-
ray, Read Intelligent Identifier, Read Status Register,
Clear Status Register, Erase and Program com-
mands. In the event of a read command, the CUI
simply points the read path at either the array, the
Intelligent Identifier, or the status register depending
on the specific read command given. For a program
or erase cycle, the CUI informs the write state ma-
chine that a write or erase has been requested. Dur-
ing a program cycle, the Write State Machine will
control the program sequences and the CUI will only
respond to status reads. Durlng an erase cycle, the
CUI will respond to status reads and erase suspend.
After the Write State Machine has completed its
task, it will allow the CUI to respond to its full com-
mand set. The CUI will stay in the current command
state until the microprocessor issues another com-
mand.
The CUI will successfully initiate an erase or write
operation only when V
PP
is within its voltage range.
Depending upon the application, the system design-
er may choose to make the V
PP
power supply
switchable, available only when memory updates
are desired. The system designer can also choose
to ‘‘hard-wire’’ V
PP
to 12V. The 4-Mbit boot block
flash family is designed to accommodateDeither de-
sign practice. It is strongly recommended that RP
Y
be tied to logical Reset for data protection during
unstable CPU reset function as described in the
‘‘Product Family Overview’’ section.
3.3.1 BOOT BLOCK WRITE OPERATIONS
In the case of Boot Block modifications (write and
erase), RP
Y
is set to V
HH
e
12V typically, in addi-
tion to V
PP
at high voltage.
However, if RP
Y
is not at V
HH
when a program or
erase operation of the boot block is attempted, the
corresponding status register bit (Bit 4 for Program
and Bit 5 for Erase, refer to Table 5 for Status Regis-
ter Definitions) is set to indicate the failure to com-
plete the operation.
3.3.2 COMMAND USER INTERFACE (CUI)
The Command User Interface (CUI) serves as the
interface to the microprocessor. The CUI points the
read/write path to the appropriate circuit block as
described in the previous section. After the WSM
has completed its task, it will set the WSM Status bit
to a ‘‘1’’, which will also allow the CUI to respond to
its full command set. Note that after the WSM has
returned control to the CUI, the CUI will remain in its
current state.
3.3.2.1 Command Set
Command
Codes
Device Mode
00
10
20
40
50
70
90
B0
D0
FF
Invalid/Reserved
Alternate Program Setup
Erase Setup
Program Setup
Clear Status Register
Read Status Register
Intelligent Identifier
Erase Suspend
Erase Resume/Erase Confirm
Read Array
3.3.2.2 Command Function Descriptions
Device operations are selected by writing specific
commands into the CUI. Table 3 defines the 4-Mbit
boot block flash family commands.
12
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相关代理商/技术参数 |
参数描述 |
|---|---|
| A28F400BX-T | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:4-MBIT 256K x16, 512K x8 BOOT BLOCK FLASH MEMORY FAMILY |
| A28F400BX-T/B | 制造商:未知厂家 制造商全称:未知厂家 功能描述:A28F400BX-T/B |
| A28F5501S | 制造商:General Electric Company 功能描述:OIL FILLED CAPACITOR |
| A28F5502 | 制造商:General Electric Company 功能描述:Film Capacitor |
| A28F5502S | 制造商:General Electric Company 功能描述:CAPACITOR PP FILM 0.5UF 1KV 10% CASE 制造商:GE 功能描述:CAPACITOR PP FILM 0.5UF, 1KV, 10%, CASE 制造商:General Electric Company 功能描述:CAPACITOR PP FILM 0.5UF, 1KV, 10%, CASE; Capacitance:0.5F; Capacitance Tolerance: 10%; Capacitor Dielectric Type:Polypropylene (PP); Voltage Rating:1000V; Life Time @ Temperature:40000 hours @ 70C; Capacitor Case Style:CAN 制造商:General Electric Company 功能描述:OIL FILLED CAPACITOR |
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