参数资料
| 型号： | A3938SLQTR |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 9/11页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR MOSFET 3PH 36-QSOP |
| 标准包装： | 1,500 |
| 应用： | DC 电机控制器，无刷（BLDC），3 相 |
| 输出数： | 1 |
| 电源电压： | 18 V ~ 50 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 36-QSOP |
| 供应商设备封装： | 36-QSOP |
| 包装： | 带卷 (TR) |
A3938
Three-Phase Power MOSFET Controller
each commutation. If a stalled motor results from a fault, the
fault can only be cleared by toggling the RESET pin or by a
power-up sequence.
of the power MOSFETs. To prevent false tripping of the
sense comparator, the BLANK function disables the com-
parator for a time period de ? ned by:
Current Regulation. Load current can be regulated by
an internal ? xed off-time, PWM-control circuit. When the
t BLANK = 1.9
× C
T
/ (1
× 10
-3
– [2 / R T ])
outputs of the MOSFETs are turned on, current increases in
the motor winding until it reaches a value given by:
I TRIP = V REF / R SENSE
At the trip point, the sense comparator resets the source
enable latch, turning off the source driver. At this point, load
inductance causes the current to recirculate for the ? xed off-
time period. The current path during recirculation is deter-
mined by the con ? guration of the MODE and SR input pins.
The ? xed off-time is determined by an external resistor, R T ,
and capacitor, C T , connected in parallel from the RC terminal
to AGND. The ? xed off-time is approximated by:
t OFF = R T × C T
t OFF should be in the range between 10 μ s and 50 μ s. Larger
values for t OFF could result in audible noise problems. For
proper circuit operation, 10 k Ω < R T < 500 k Ω .
Torque control can be implemented by varying the REF input
voltage as long as the PWM input stays high. If direct control
of the torque/current is desired by PWM input, a voltage can
be applied to the REF pin to set an absolute maximum cur-
rent limit.
PWM Blank. The capacitor C T also serves as the means
to set the BLANK time duration. At the end of a PWM
off-cycle, a high-side gate selected by the commutation logic
turns on. At this time, large current transients can occur dur-
ing the reverse recovery time, t rr , of the intrinsic body diodes
Brake Control
The user must ensure that C T is large enough to cover the
current spike duration.
Braking. The A3938 dynamically brakes the motor by
forcing all low-side power MOSFETs on, and all high-side
power MOSFETs off. This effectively short-circuits the
BEMF and brakes the motor. During braking, the load cur-
rent can be approximated by:
I BRAKEPEAK = V BEMF / R LOAD
As the current does not ? ow through the sense resistor dur-
ing a dynamic brake, care should be taken to ensure that the
maximum ratings of the power MOSFETs are not exceeded.
Note: On its rising edge, a RESET setting of 1 overrides the
BRAKE input pin and latches the condition selected by the
BRKSEL pin.
Power Loss Brake. The BRKCAP and BRKSEL pins
provide a power-down braking option. A Power-Loss Brake
Trigger Event, which is either an undervoltage on VREG
or a RESET = 1 rising edge, is sensed by the A3938, which
then dynamically brakes or coasts (depending on the stored
BRKSEL setting) the motor. The reservoir capacitor on the
BRKCAP pin provides the positive voltage that forces the
low-side gates of the power MOSFETs high, keeping them
on, even after supply voltage is lost. A stored setting of BRK-
SEL = 1 brakes the motor, but a stored setting of BRKSEL = 0
coasts it. The combined effect of these settings is shown in the
table Brake Control.
BRAKE
0
0
1
1
BRKSEL
0
1
0
1
Before Power Loss Brake Trigger Event
Normal run mode
Normal run mode
Brake mode – All low-side gate drivers ON
Brake mode – All low-side gate drivers ON
After Power Loss Brake Trigger Event
Coast mode – All gate drive outputs OFF
Brake mode – All low-side gate drivers ON
Coast mode – All gate drive outputs OFF
Brake mode – All low-side gate drivers ON
Allegro MicroSystems, LLC
115 Northeast Cutoff
9
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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