参数资料
型号: A3977KLP
厂商: Allegro Microsystems Inc
文件页数: 8/19页
文件大小: 0K
描述: IC MOTOR DRVR PWM DUAL 28TSSOP
标准包装: 50
应用: 步进电机驱动器
输出数: 1
电流 - 输出: ±2.5A
电压 - 负载: 8 V ~ 35 V
电源电压: 3 V ~ 5.5 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.173",4.40mm 宽)裸露焊盘
供应商设备封装: 28-TSSOP 裸露焊盘
包装: 管件
A3977
Microstepping DMOS Driver with Translator
Functional Description (cont’d)
Fixed Off-Time. The internal PWM current-control
circuitry uses a one shot to control the time the drivers
remain off. The one shot off-time, t off , is determined by
the selection of an external resistor (R T ) and capacitor (C T )
connected from the RC timing terminal to ground. The off-
time, over a range of values of C T = 470 pF to 1500 pF and
R T = 12 k Ω to 100 k Ω is approximated by:
t off = R T C T
RC Blanking. In addition to the ? xed off-time of the
PWM control circuit, the C T component sets the compara-
tor blanking time. This function blanks the output of the
current-sense comparator when the outputs are switched by
the internal current-control circuitry. The comparator out-
put is blanked to prevent false over-current detection due
to reverse recovery currents of the clamp diodes, and/or
switching transients related to the capacitance of the load.
The blank time t BLANK can be approximated by:
t BLANK = 1400C T
Charge Pump. (CP 1 and CP 2 ). The charge pump is
used to generate a gate supply greater than V BB to drive
the source-side DMOS gates. A 0.22 μ F ceramic capacitor
should be connected between CP 1 and CP 2 for pumping
purposes. A 0.22 μ F ceramic capacitor is required between
V CP and V BB to act as a reservoir to operate the high-side
DMOS devices.
V REG . This internally generated voltage is used to operate
the sink-side DMOS outputs. The V REG terminal should
be decoupled with a 0.22 μ F capacitor to ground. V REG is
internally monitored and in the case of a fault condition,
the outputs of the device are disabled.
Enable Input (ENABLE). This active-low input enables
all of the DMOS outputs. When logic high the outputs are
disabled. Inputs to the translator (STEP, DIRECTION,
MS 1 , MS 2 ) are all active independent of the ENABLE
input state.
Shutdown. In the event of a fault (excessive junction
temperature, or low voltage on V CP ) the outputs of the
device are disabled until the fault condition is removed. At
power up, and in the event of low V DD , the undervoltage
lockout (UVLO) circuit disables the drivers and resets the
translator to the HOME state.
Sleep Mode (SLEEP). An active-low control input used
to minimize power consumption when not in use. This
disables much of the internal circuitry including the output
DMOS, regulator, and charge pump. A logic high allows
normal operation and startup of the device in the home
position. When coming out of sleep mode, wait
1 ms before issuing a STEP command to allow the charge
pump (gate drive) to stabilize.
Percent Fast Decay Input (PFD). When a STEP input
signal commands a lower output current from the previous
step, it switches the output current decay to either slow-,
fast-, or mixed-decay depending on the voltage level at the
PFD input. If the voltage at the PFD input is greater than
0.6 V DD then slow-decay mode is selected. If the voltage
on the PFD input is less than 0.21 V DD then fast-decay
mode is selected. Mixed decay is between these two levels.
This terminal should be decoupled with a 0.1 μ F capacitor.
Mixed Decay Operation. If the voltage on the PFD in-
put is between 0.6V DD and 0.21V DD , the bridge will oper-
ate in mixed-decay mode depending on the step sequence
(see ? gures). As the trip point is reached, the device will
go into fast-decay mode until the voltage on the RC termi-
nal decays to the voltage applied to the PFD terminal. The
time that the device operates in fast decay is approximated
by:
t FD = R T C T In (0.6V DD /V PFD )
After this fast decay portion, t FD , the device will
switch to slow-decay mode for the remainder of the ? xed
off-time period.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
8
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