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参数资料
| 型号： | A3998SETTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 8/20页 |
| 文件大小： | 0K |
| 描述： | IC MOTOR DRIVER DUAL DMOS QFN |
| 标准包装： | 1 |
| 应用： | 直流电机驱动器，PWM 电机驱动器，步进电机驱动器 |
| 输出数： | 1 或 2 |
| 电流 - 输出： | ±1.5A |
| 电压 - 负载： | 9 V ~ 50 V |
| 电源电压： | 3 V ~ 5.5 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN |
| 包装： | 标准包装 |
| 其它名称： | 620-1459-6 |
A3998
Linear Regulator
An adjustable voltage rail from 1 to 2.5 V is integrated into the
device. The switcher output is fed back into the device through
the VIN pin and supplies the integrated linear pass element. To
reduce power dissipation in the A3998, the linear regulator can be
configured to drive the gate of an external N-channel FET. Using
the external FET significantly reduces power dissipation in the IC
and can allow the device to operate in high ambient temperature
environments.
The regulator has two configurations: Internal mode and External
mode. External mode is used to minimize power dissipation. In
External mode current is limited by selection of the sense resistor,
RCL. Internal mode is selected by connecting pin CSN to the
Dual DMOS Full Bridge Motor Driver
With Serial Port Control and Dual Regulators
VREG pin. Both internal and external configurations are current
limited.
Internal Configuration When the internal pass element is con-
figured the internal current limit is fixed at I CL2 . The regulator
has overcurrent protection with foldback. Figure 3 shows the I?V
characteristic of the linear regulator.
External Configuration When the external pass element is
configured the current is adjustable by selecting the value of a
current limit resistor R CL2 . When the voltage across the resistor
equals V CL2 the regulator enters current limit and will fold back
according to the waveform shown in figure 3. To calculate the
current limit use the formula below:
6.0
5.0
4.0
V VOUT1 = 5 V
V CL2 / I LIM = R CL
where I LIM is the target current limit.
Serial Port
(1)
V VOUT1 = 3.3 V
3.0
2.0
Serial Port Writing
The serial port is accessed for writing only, using the STB
(Strobe), CLK (clock), DATA and SLEEPN pins. Addressing
consists of word selection bits (D15:D14) followed by the bit
1.0
V IN = 42 V
values for each parameter in the word. Timing requirements are
shown in figure 4.
0.0
0.0
0.5
1.0
1.5
2.0
2.5
VOUT1 Current (A)
Figure 2. Switcher current limit with foldback
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
V VOUT2 = 1.8 V
V VOUT2 = 1.5 V
V VOUT2 =1.0 V
V IN = 5 V
0.0
0.0
0.1
0.2
0.3 0.4
0.5
0.6
0.7
0.8
VOUT2 Current (A)
Figure 3. Linear current limit with foldback
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
8
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