参数资料
型号: A3PE600-1PQ208
厂商: Microsemi SoC
文件页数: 95/162页
文件大小: 0K
描述: IC FPGA 600000 GATES 208-PQFP
标准包装: 24
系列: ProASIC3E
RAM 位总计: 110592
输入/输出数: 147
门数: 600000
电源电压: 1.425 V ~ 1.575 V
安装类型: 表面贴装
工作温度: 0°C ~ 70°C
封装/外壳: 208-BFQFP
供应商设备封装: 208-PQFP(28x28)
ProASIC3E DC and Switching Characteristics
2-24
Revision 13
Single-Ended I/O Characteristics
3.3 V LVTTL / 3.3 V LVCMOS
Low-Voltage Transistor–Transistor Logic is a general-purpose standard (EIA/JESD) for 3.3 V
applications. It uses an LVTTL input buffer and push-pull output buffer. The 3.3 V LVCMOS standard is
supported as part of the 3.3 V LVTTL support.
Table 2-25 Minimum and Maximum DC Input and Output Levels
3.3 V LVTTL /
3.3 V LVCMOS
VIL
VIH
VOL
VOH IOL IOH
IOSL
IOSH
IIL1 IIH2
Drive Strength
Min.
V
Max.
V
Min.,
V
Max.
V
Max.
V
Min.
VmA mA
Max.
mA3
Max.
mA3
A4 A4
4 mA
–0.3
0.8
2
3.6
0.4
2.4
4
27
25
10 10
8 mA
–0.3
0.8
2
3.6
0.4
2.4
8
54
51
10 10
12 mA
–0.3
0.8
2
3.6
0.4
2.4
12 12
109
103
10 10
16 mA
–0.3
0.8
2
3.6
0.4
2.4
16 16
127
132
10 10
24 mA
–0.3
0.8
2
3.6
0.4
2.4
24 24
181
268
10 10
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V< VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN< VCCI. Input current is
larger when operating outside recommended ranges.
3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
4. Currents are measured at 85°C junction temperature.
5. Software default selection highlighted in gray.
Figure 2-6 AC Loading
Table 2-26 3.3 V LVTTL / 3.3 V LVCMOS AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
VREF (typ.) (V)
CLOAD (pF)
0
3.3
1.4
35
Note: *Measuring point = Vtrip. See Table 2-15 on page 2-18 for a complete table of trip points.
Test Point
Enable Path
Datapath
35 pF
R = 1 k
R to VCCI for tLZ / tZL / tZLS
R to GND for tHZ / tZH / tZHS
35 pF for tZH / tZHS / tZL / tZLS
35 pF for tHZ / tLZ
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