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参数资料
型号： A40MX02-FVQG80
厂商： Microsemi SoC
文件页数： 47/142页
文件大小： 0K
描述： IC FPGA MX SGL CHIP 3K 80-VQFP
标准包装： 90
系列： MX
输入/输出数： 57
门数： 3000
电源电压： 3 V ~ 3.6 V，4.75 V ~ 5.25 V
安装类型： 表面贴装
工作温度： 0°C ~ 70°C
封装/外壳： 80-TQFP
供应商设备封装： 80-VQFP（14x14）
Datasheet Information
3- 2
R ev isio n 1 1
v6.0
(continued)
The Table 1-7 Absolute Maximum Ratings for 42MX Devices* and the Table 1-6
Absolute Maximum Ratings for 40MX Devices* were updated.
1-16
The Table 1-9 5V TTL Electrical Specifications was updated.
1-18
The Table 1-13 3.3V LVTTL Electrical Specifications was updated.
1-20
In the "Mixed 5.0V/3.3V Electrical Specifications" section, Table 1-14 Absolute
Maximum
Ratings*,
Table 1-15
Recommended
Operating
Conditions,
and
Table 1-16 Mixed 5.0V/3.3V Electrical Specifications were updated.
1-21
Table 1-17 DC Specification (5.0 V PCI Signaling)1 was updated.
1-23
Table 1-19 DC Specification (3.3 V PCI Signaling)1 was updated.
1-24
The "Junction Temperature (TJ)" section, "Package Thermal Characteristics" section,
and the tables were updated.
1-26
Figure 1-16 40MX Timing Model* was updated.
1-27
Figure 1-18 42MX Timing Model (Logic Functions Using Quadrant Clocks) was
updated.
1-28
Figure 1-19 42MX Timing Model (SRAM Functions) was updated.
1-29
Figure 1-26 Output Buffer Latches was updated.
1-32
Table 1-22 42MX Temperature and Voltage Derating Factors is new.
1-36
Table 1-23 40MX Temperature and Voltage Derating Factors is new.
1-36
The "Pin Descriptions" section was updated.
1-83
In the "PQ100" table, Pin 64 (42MX09 and 42MX16) has changed to LP.
2-10
In the "PQ160" table, Pin 61 (42MX09, 42MX16, and 42MX64) has changed to LP.
2-14
In the "PQ208" table, the following pins changed:
Pin 129 (42MX09, 42MX16, and 42MX64) has changed to LP.
Pin 198 (42MX09) has changed to I/O.
2-20
The n the "PQ240" table, Pin 91 (42MX36) has changed to LP.
2-27
In the "VQ100" table, Pin 62 (42MX09 and 42MX16) has changed to LP.
2-33
In the "TQ176" table, Pin 109 (42MX09 and 42MX16) has changed to LP.
2-35
In the "BG272" table, Pin K20 (42MX36) has changed to LP.
2-48
v5.1
The "Low Power Mode" section was updated.
1-9
Footnote 8 in Table 1-9 5V TTL Electrical Specifications was updated.
1-18
Footnote 8 in Table 1-13 3.3V LVTTL Electrical Specifications was updated.
1-20
v5.0
Because the changes in this data sheet are extensive and technical in nature, this
should be viewed as a new document. Please read it as you would a datasheet that is
published for the first time.
ALL
Note that the “Package Characteristics and Mechanical Drawings” section has been
eliminated from the datasheet. The mechanical drawings are now contained in a
separate document, Package Mechanical Drawings, available on the Microsemi SoC
Products Group website.
Revision
Changes
Page
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A40MX02-PL100 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:40MX and 42MX FPGA Families
A40MX02-PL100ES 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:40MX and 42MX FPGA Families
A40MX02-PL100I 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:40MX and 42MX FPGA Families
A40MX02-PL100M 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:40MX and 42MX FPGA Families
A40MX02-PL208A 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:40MX and 42MX Automotive FPGA Families
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