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参数资料
型号： A40MX04-3PL68IX79
元件分类： FPGA
英文描述： FPGA, 547 CLBS, 6000 GATES, 109 MHz, PQCC68
封装： PLASTIC, LCC-68
文件页数： 26/124页
文件大小： 3142K
代理商： A40MX04-3PL68IX79
FPGA Families 40MX and 42MX
v6.1
3-1
Datasheet Information
List of Changes
The following table lists critical changes that were made in the current version of the document.
Previous version
Changes in current version (v 6. 1 )
Page
v6.0
(January 2004)
In Table 14 Absolute Maximum Ratings*, the limits in VI were changed from -0.5 to VCCI+0.5
to -0.5 to VCCA+0.5.
1-18
In Table 16 Mixed 5.0V/3.3V Electrical Specifications, VOH was changed from 3.7 to 2.4 for the
min in industrial and military. VIH had VCCI and that was changed to VCCA.
1-18
v5.1
The "Ease of Integration" section was updated.
1-i
The "Temperature Grade Offerings" section is new.
1-iii
The "Speed Grade Offerings" section is new.
1-iii
The "General Description" section was updated.
1-1
The "MultiPlex I/O Modules" section was updated.
1-6
The "User Security" section was updated.
1-6
Table 1 Voltage Support of MX Devices was updated.
1-7
The "Power Dissipation" section was updated.
1-8
The "Static Power Component" section was updated.
1-8
The "Equivalent Capacitance" section was updated.
1-8
Figure 1-13 Silicon Explorer II Setup with 42MX was updated.
1-10
Table 4 Supported BST Public Instructions was updated.
1-11
Figure 1-14 42MX IEEE 1149.1 Boundary Scan Circuitry was updated.
1-11
Table 5 Boundary Scan Pin Configuration and Functionality was updated.
1-12
The "Development Tool Support" section was updated.
1-13
The Table 7 Absolute Maximum Ratings for 42MX Devices* and the Table 6 Absolute
Maximum Ratings for 40MX Devices* were updated.
1-14
The Table 9 5V TTL Electrical Specifications was updated.
1-15
The Table 13 3.3V LVTTL Electrical Specifications was updated.
1-17
In the "Mixed 5.0V/3.3V Electrical Specifications" section, Table 14 Absolute Maximum
Ratings*, Table 15 Recommended Operating Conditions, and Table 16 Mixed 5.0V/3.3V
Electrical Specificationswere updated.
1-18
The Table 17 DC Specification (5.0V PCI Signaling)1 was updated.
1-19
The Table 19 DC Specification (3.3V PCI Signaling)1 was updated.
1-20
The <zBlue>Junction Temperature (TJ) section, "Package Thermal Characteristics" section, and the
tables were updated.
1-22
Figure 1-17 40MX Timing Model* was updated.
1-23
Figure 1-19 42MX Timing Model (Logic Functions Using Quadrant Clocks)
1-24
The Figure 1-20 42MX Timing Model (SRAM Functions) was updated.
1-24
The Figure 1-27 Output Buffer Latches was updated.
1-27
The Table 22 42MX Temperature and Voltage Derating Factors is new.
1-31
The Table 23 40MX Temperature and Voltage Derating Factors is new.
1-32
The "Pin Descriptions" section was updated.
1-77
相关PDF资料
PDF描述
A40MX04-3PL68I FPGA, 547 CLBS, 6000 GATES, 109 MHz, PQCC68
A40MX04-3PL68X79 FPGA, 547 CLBS, 6000 GATES, 109 MHz, PQCC68
A40MX04-3PL68 FPGA, 547 CLBS, 6000 GATES, 109 MHz, PQCC68
A40MX04-3PL84IX79 FPGA, 547 CLBS, 6000 GATES, 109 MHz, PQCC84
A40MX04-3PL84I FPGA, 547 CLBS, 6000 GATES, 109 MHz, PQCC84
相关代理商/技术参数
参数描述
A40MX04-3PL68M 制造商:未知厂家 制造商全称:未知厂家 功能描述:Field Programmable Gate Array (FPGA)
A40MX04-3PL84 功能描述:IC FPGA MX SGL CHIP 6K 84-PLCC RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:MX 标准包装:90 系列:ProASIC3 LAB/CLB数:- 逻辑元件/单元数:- RAM 位总计:36864 输入/输出数:157 门数:250000 电源电压:1.425 V ~ 1.575 V 安装类型:表面贴装 工作温度:-40°C ~ 125°C 封装/外壳:256-LBGA 供应商设备封装:256-FPBGA（17x17）
A40MX04-3PL84I 功能描述:IC FPGA MX SGL CHIP 6K 84-PLCC RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:MX 标准包装:90 系列:ProASIC3 LAB/CLB数:- 逻辑元件/单元数:- RAM 位总计:36864 输入/输出数:157 门数:250000 电源电压:1.425 V ~ 1.575 V 安装类型:表面贴装 工作温度:-40°C ~ 125°C 封装/外壳:256-LBGA 供应商设备封装:256-FPBGA（17x17）
A40MX04-3PL84M 制造商:未知厂家 制造商全称:未知厂家 功能描述:Field Programmable Gate Array (FPGA)
A40MX04-3PLG44 功能描述:IC FPGA MX SGL CHIP 6K 44-PLCC RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:MX 标准包装:90 系列:ProASIC3 LAB/CLB数:- 逻辑元件/单元数:- RAM 位总计:36864 输入/输出数:157 门数:250000 电源电压:1.425 V ~ 1.575 V 安装类型:表面贴装 工作温度:-40°C ~ 125°C 封装/外壳:256-LBGA 供应商设备封装:256-FPBGA（17x17）
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