参数资料
型号: A4402ELPTR-T
厂商: Allegro Microsystems Inc
文件页数: 9/17页
文件大小: 0K
描述: IC REG DL BUCK/LINEAR 16-TSSOP
标准包装: 1
拓扑: 降压(降压)(1),线性(LDO)(1)
功能: 任何功能
输出数: 2
频率 - 开关: 2MHz
电压/电流 - 输出 1: 3.3 V ~ 5 V,1A
电压/电流 - 输出 2: 1.8 V ~ 3.3 V,250mA
带 LED 驱动器:
带监控器:
带序列发生器:
电源电压: 6 V ~ 50 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm)裸露焊盘
供应商设备封装: 16-TSSOP-EP
包装: 标准包装
产品目录页面: 1141 (CN2011-ZH PDF)
其它名称: 620-1331-6
A4402
FB Both output regulators use a resistive feedback network to set
the output voltage. To prevent introducing noise into the FB net-
work it is important to keep the total impedance of the FB nodes
low enough to prevent noise injection. For commercial applica-
tions it is recommended that the impedances on the FB nodes are
less than 50 k?. For automotive applications it is recommended 
that the total impedance of the FB nodes is less than 25 k?.
Constant On-Time Buck Converter
With Integrated Linear Regulator
up normally. Refer to timing diagrams for details.
BOOT A bootstrap capacitor is used to provide adequate charge
to the NMOS switch. The boot capacitor is referenced to LX
and supplies the gate drive with a voltage larger than the supply
voltage. The size of the capacitor must be 0.01 μF, X7R type, and 
rated for at least 25 V.
TSET The TSET pin serves a dual function by controlling the
TON  A resistor from the TON input to VIN1 sets the on-time of 
timing for both the soft start ramp and the WDI input. The current  the converter for a given input voltage. The formula to calculate
sourced from the TSET pin is dependant on the state of NPOR. the on-time, t ON (ns), is:
t WDI = 7.2 × 9.6 × 10 4 × C TSET , and
t SS = 6.0 × 6.0 × 10 4 × C TSET ,
t ON =
R TON (5)
V IN1
Therearetwoformulasforcalculatingthetimeconstants.C TSET
must be selected so that both the WDI frequency and soft start 
requirements are met. The formulas for calculating WDI and soft 
start timing are:
(3)
(4)
where C TSET is the value of the capacitor and the results,
t x , are in s.
Watchdog  The WDI input is used to monitor the state of a DSP 
or microcontroller. A constant current is driven into the capacitor
on TSET, causing the voltage on the TSET pin to ramp upward
until, at each rising edge on the WDI input, the ramp is pulled 
down to V RESET . If no edge is seen on the WDI pin before the 
ramp reaches V TRIP , the NPOR pin is pulled low.
The watchdog timer is not activated until the WDI input sees one 
rising edge. If the watchdog timer is not going to be used, the
WDI pin should be pulled to ground with a 4.7 k? resistor.
Soft Start During soft start, an internal ramp generator and the
external capacitor on TSET are used to ramp the output voltage
in a controlled fashion. This reduces the demand on the exter-
nal power supply by limiting the current that charges the output
capacitor and any DC load at startup. Either of the following
conditions are required to trigger a soft start:
? ENB pin input rising edge
? Reset of a TSD event
When a soft start event occurs, VO2 is held in the off state until 
the soft start ramp timer expires. Then the regulator will power
3.12 10 –12 + 60 × 10 . –9
When the supply voltage is between 9 and 17.5 V, the switcher 
period remains constant, at a level based on the selected value
of R ton  . At voltages lower than 9 V and higher than 17.5 V, the 
period is increased by a factor of 3.5.
If a constant period is desired over varying input voltages, it is
important to select an on-time that under worst case conditions
will not exceed the minimum off-time or minimum on-time of the
converter. For reasonable input voltage ranges, the period of the
converter can be held constant, resulting in a constant operating
frequency over the input supply range.
More information on how to choose R ton can be found in the
Application Information section.
ISEN The sense input is used to sense the current in the diode
during the off-time cycle. The value for R SENSE is obtained by the
formula:
R SENSE = V ISEN / I VALLEY   , (6)
where I VALLEY is the lowest current measured through the induc-
tor during the off-time cycle.
It is recommended that the current sense resistor be sized so that,
at peak output current, the voltage on ISEN does not exceed
–0.5 V. Because the diode current is measured when the inductor 
current is at the valley, the average output current is greater than
the I VALLEY value. The value for I VALLEY should be:
I VALLEY = I OUT(av)  – 0.5  I RIPPLE + K , (7)
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
9
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