参数资料
| 型号： | A54SX08-PQ208 |
| 厂商： | Microsemi SoC |
| 文件页数： | 13/64页 |
| 文件大小： | 0K |
| 描述： | IC FPGA SX 12K GATES 208-PQFP |
| 标准包装： | 24 |
| 系列： | SX |
| LAB/CLB数： | 768 |
| 输入/输出数： | 130 |
| 门数： | 12000 |
| 电源电压： | 3 V ~ 3.6 V，4.75 V ~ 5.25 V |
| 安装类型： | 表面贴装 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 208-BFQFP |
| 供应商设备封装： | 208-PQFP（28x28） |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页当前第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页
SX Family FPGAs
1- 16
v3.2
Evaluating Power in SX Devices
A critical element of system reliability is the ability of
electronic devices to safely dissipate the heat generated
during operation. The thermal characteristics of a circuit
depend on the device and package used, the operating
temperature, the operating current, and the system's
ability to dissipate heat.
You should complete a power evaluation early in the
design process to help identify potential heat-related
problems in the system and to prevent the system from
exceeding the device’s maximum allowed junction
temperature.
The actual power dissipated by most applications is
significantly lower than the power the package can
dissipate.
However,
a
thermal
analysis
should
be
performed for all projects. To perform a power
evaluation, follow these steps:
1. Estimate
the
power
consumption
of
the
application.
2. Calculate the maximum power allowed for the
device and package.
3. Compare the estimated power and maximum
power values.
Estimating Power Consumption
The total power dissipation for the SX family is the sum
of the DC power dissipation and the AC power
dissipation. Use EQ 1-5 to calculate the estimated power
consumption of your application.
PTotal = PDC + PAC
EQ 1-5
DC Power Dissipation
The power due to standby current is typically a small
component of the overall power. The Standby power is
shown
in
for
commercial,
worst-case
conditions (70
°C).
The DC power dissipation is defined in EQ 1-6.
PDC = (Istandby) × VCCA + (Istandby) × VCCR +
(Istandby) × VCCI + xVOL × IOL + y(VCCI – VOH) × VOH
EQ 1-6
AC Power Dissipation
The power dissipation of the SX Family is usually
dominated by the dynamic power dissipation. Dynamic
power dissipation is a function of frequency, equivalent
capacitance, and power supply voltage. The AC power
PAC = PModule + PRCLKA Net + PRCLKB Net + PHCLK Net +
POutput Buffer + PInput Buffer
EQ 1-7
PAC = VCCA
2 × [(m × C
EQM × fm)Module +
(n × CEQI × fn)Input Buffer+ (p × (CEQO + CL) × fp)Output Buffer +
(0.5 × (q1 × CEQCR × fq1) + (r1 × fq1))RCLKA +
(0.5 × (q2 × CEQCR × fq2)+ (r2 × fq2))RCLKB +
(0.5 × (s1 × CEQHV × fs1) + (CEQHF × fs1))HCLK]
EQ 1-8
Definition of Terms Used in Formula
m
=
Number of logic modules switching at fm
n
=
Number of input buffers switching at fn
p
=
Number of output buffers switching at fp
q1
=
Number of clock loads on the first routed array
clock
q2
=
Number of clock loads on the second routed array
clock
x
=
Number of I/Os at logic low
y
=
Number of I/Os at logic high
r1
=
Fixed capacitance due to first routed array clock
r2
=
Fixed capacitance due to second routed array
clock
s1
=
Number of clock loads on the dedicated array
clock
CEQM = Equivalent capacitance of logic modules in pF
CEQI
=
Equivalent capacitance of input buffers in pF
CEQO = Equivalent capacitance of output buffers in pF
CEQCR = Equivalent capacitance of routed array clock in pF
CEQHV = Variable capacitance of dedicated array clock
CEQHF = Fixed capacitance of dedicated array clock
CL
=
Output lead capacitance in pF
fm
=
Average logic module switching rate in MHz
fn
=
Average input buffer switching rate in MHz
fp
=
Average output buffer switching rate in MHz
fq1
=
Average first routed array clock rate in MHz
fq2
=
Average second routed array clock rate in MHz
fs1
=
Average dedicated array clock rate in MHz
Table 1-12 Standby Power
ICC
VCC
Power
4 mA
3.6 V
14.4 mW
相关PDF资料 |
PDF描述 |
|---|---|
| A42MX16-TQ176 | IC FPGA MX SGL CHIP 24K 176-TQFP |
| A54SX32A-TQ100I | IC FPGA SX 48K GATES 100-TQFP |
| A54SX32A-1TQ100 | IC FPGA SX 48K GATES 100-TQFP |
| A54SX32A-1TQG100 | IC FPGA SX 48K GATES 100-TQFP |
| A54SX32A-TQG100I | IC FPGA SX 48K GATES 100-TQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| A54SX08-PQ208I | 功能描述:IC FPGA SX 12K GATES 208-PQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:SX 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27） |
| A54SX08-PQ208M | 制造商:未知厂家 制造商全称:未知厂家 功能描述:54SX Family FPGAs |
| A54SX08-PQ208PP | 制造商:未知厂家 制造商全称:未知厂家 功能描述:54SX Family FPGAs |
| A54SX08-PQG208 | 功能描述:IC FPGA SX 12K GATES 208-PQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:SX 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27） |
| A54SX08-PQG208I | 功能描述:IC FPGA SX 12K GATES 208-PQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:SX 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27） |
发布紧急采购，3分钟左右您将得到回复。