参数资料
型号: A6265KLPTR-T
厂商: Allegro Microsystems Inc
文件页数: 9/17页
文件大小: 0K
描述: IC LED CTLR HI CURRENT 16-TSSOP
标准包装: 1
恒定电流:
拓扑: PWM,SEPIC,降压(降压),升压(升压)
输出数: 1
内部驱动器:
类型 - 主要: 车载
频率: 可调节/可选择
电源电压: 6.5 V ~ 50 V
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm)裸露焊盘
供应商设备封装: 16-TSSOP-EP
包装: 标准包装
工作温度: -40°C ~ 150°C
其它名称: 620-1394-6
A6265
Automotive High Current LED Controller
LED Current Level The LED current is determined by a
combination of the LED sense resistor, R SL , the LED current
threshold voltage, V IDL , and the voltage between the IREF pin
and GND ( V IREF ).
The 100% current level, when the IREF pin is connected to
VREG, is defined as:
I LED (max) = V IDL / R SL (2)
If V IREF is less than 1 V then the 100% current level is defined as:
I LED (max) = V IREF / (10 × R SL ) (3)
This feature provides direct analog dimming using a voltage from
0 to 1 V. This can be used to provide intensity-matching between
modules or groups of LEDs in critical display or backlighting
applications. It can also be used to provide a soft start, by con-
necting a capacitor from IREF to GND and a resistor from IREF
to VREG, or one-step dimming by use of a single logic control.
LED Brightness: PWM Dimming LED brightness can
be controlled by changing the current, which affects the light
intensity. However in some applications, for example with amber
LEDs, this will have some effect on the color of the LEDs.
In these cases it is more desirable to control the brightness by
switching the fixed LED current with a pulse width modulated
signal. This allows the LED brightness to be set with little effect
on the LED color and intensity and allows direct digital control
of the LED brightness.
A PWM signal can be applied to the EN input to enable PWM
dimming. The period of this signal should be less than the
minimum disable time, t DIS . During PWM dimming, the A6265
switches the LED current between 100% and typically 8% of
the full current. This ensures that the voltage change across the
LED string is limited to a few volts, depending on the number
of LEDs. This limits the stress on the load capacitor (across
the string of LEDs) due to large changes in voltage. If the load
capacitor is a multilayer ceramic type, then this will reduce any
audible noise due to the piezoelectric effect of the capacitor.
The rate of change of the LED current is also limited, to reduce
any large variations in the input current.
Provided this is low, then the complete circuit may remain con-
nected to the power supply under all conditions. Note that the
disable time is derived from the oscillator period by a ratio of
32,768, so any variation in the oscillator frequency will change
the disable time.
Oscillator The main oscillator may be configured as a clock
source or it may be driven by an external clock signal. The oscil-
lator is designed to run between 100 and 700 kHz.
When the oscillator is configured as a clock source, the frequency
is controlled by a single external resistor, R OSC (k Ω ), between the
OSC pin and the GND pin. The oscillator frequency is approxi-
mately:
f OSC = 21700 / R OSC (kHz) (4)
Figure 2 shows the resulting f OSC for various values of R OSC .
If the OSC pin is connected to VREG or GND, the oscillator
frequency will be set internally to approximately 350 kHz.
When an external clock source is used to drive the OSC pin, it
can synchronize a number of A6265s operating together. This
ensures that only a single fundamental frequency is detectable
on the supply line, thus simplifying the design of any required
EMC filter. The disadvantage of using a single external clock
source is that all controllers will be switching current from the
supply at the same time. However, this effect may be reduced,
and the EMC performance may be further enhanced, by using
the CKOUT pin of another A6265 as the external clock source.
In this case the switching point of each subsequent A6265 in the
chain will be delayed from that of the previous A6265, and the
current pulses will be spread across the oscillator period.
700
600
500
400
300
200
Sleep Mode If EN is held low for longer than the disable time,
t DIS , then the A6265 will shut down and put all sections into a
low-power sleep mode. In this mode the bias current is typically
less than 4 μ A. In the buck-boost configuration the only leakage
path remaining will be the path through the MOSFET.
100
30 50 70 90 110 130 150 170
External Resistor Value, R OSC (k Ω )
Figure 2. Internal oscillator frequency when set by R OSC
Allegro MicroSystems, LLC
115 Northeast Cutoff
190
210
9
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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