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| 型号： | A8285SLBTR |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 8/18页 |
| 文件大小： | 0K |
| 描述： | IC REG LNB SUPPLY/CTRL 16-SOIC |
| 标准包装： | 1,000 |
| 应用： | 转换器，模拟和数字式卫星信号接收器 |
| 输入电压： | 6 V ~ 16 V |
| 输出数： | 1 |
| 输出电压： | 12.7 V ~ 20.4 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 16-SOIC W |
| 包装： | 带卷 (TR) |
A8285 and
A8287
LNB Supply and Control Voltage Regulator
this feature is disabled and the device is not turned off during
an overcurrent.
Status Register . The status of the A8285/A8287 read regis-
ter can be interrogated by the system master controller via the
I 2 C?–compatible interface. Status functions include the follow-
ing:
? Power Not Good (PNG) . When the LNB output is enabled, and
the LNB output is below 85% of the programmed LNB voltage,
the PNG bit is set.
? Disable (DIS). Provides the status of the LNB output. When
set, this indicates that the output is disabled, either intentionally
or by a fault.
? Thermal Shutdown (TSD) . When the junction temperature
exceeds the maximum threshold, the thermal shutdown bit is set,
which disables the LNB output. DIS also is set.
? Overcurrent (OCP) . This disables LNB output when an
overcurrent appears on the LNB output for a period greater than
the ODT (ODT must be enabled for this feature to take effect).
In addition, the DIS bit is set. Note: If an overcurrent occurs and
ODT is disabled, the A8285/A8287 will operate in current limit
indefininitely and the OCP bit will not be set.
? Undervoltage Lockout (VUV) . When the input voltage (V IN )
drops below the undervoltage threshold, the undervoltage bit
VUV is set, disabling the output.
When V IN is initially applied to the A8285/A8285, the VUV bit is
set, indicating that an undervoltage condition has occurred.
IRQ Flag . The IRQ flag is activated when any fault condition
occurs, including: thermal shutdown, overcurrent, undervoltage,
or the occurrence of a power-up sequence. Note that the IRQ flag
is not activated when either (a) the channel is disabled (DIS), as
it may have been disabled intentionally by the master controller,
or (b) if PNG is active, as the A8285/A8287 may be starting up.
Fault conditions are stored in the status registers. Also note that
the IRQ flag will not activate when an overcurrent occurs and
ODT is disabled. In this condition, the device operates within
I LIM .
When the IRQ flag is activated during either of the above fault
conditions, and the system master controller addresses the
A8285/A8287 with the read/write bit set to 1, then the IRQ flag
is reset once the A8285/A8287 acknowledges the address. When
the master controller reads the data and is acknowledged, the
status registers are updated. If the fault is removed, the A8285/
Output Voltage Amplitude Selection Table
VSEL3 VSEL2 VSEL1 VSEL0
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
LNB (V)
12.709
13.042
13.375
13.709
14.042
14.375
14.709
15.042
18.042
18.375
18.709
19.042
A8287 is again ready for operation (being re-enabled via a write
command). Otherwise, the controller can keep polling the A8285/
A8287 until the fault is removed.
When V IN , is initially applied to the A8285/A8285, the I 2 C?–
compatible interface will not function until the internal logic
supply V REG has reached its operating level. Once V REG is within
tolerance, the VUV bit in the status register is set and the IRQ is
activated to inform the master controller of this condition. (The
IRQ is effectively acting as a power-up flag.) The IRQ is reset
when the A8285/A8287 acknowledges the address. Once the
master has read the status registers, the VUV bit is reset. The
device is then ready for operation.
I 2 C?–Compatible Interface . This is a serial interface that
uses two bus lines, SCL and SDA, to access the internal Control
and Status registers of the A8285/A8287. Data is exchanged
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
19.375
19.709
20.042
20.375
between a microcontroller (master) and the A8285/A8287 (slave).
The clock input to SCL is generated by the master, while SDA
functions as either an input or an open drain output, depending on
the direction of the data.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
8
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| A8285SLBTR-T | 功能描述:IC LNB SUPPLY/VOLTAGE REG 16SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:2,000 系列:- 应用:控制器，DSP 输入电压:4.5 V ~ 25 V 输出数:2 输出电压:最低可调至 1.2V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:30-TFSOP（0.173"，4.40mm 宽） 供应商设备封装:30-TSSOP 包装:带卷 (TR) |
| A8286 | 制造商:ALLEGRO 制造商全称:Allegro MicroSystems 功能描述:Dual LNB Supply and Control Voltage Regulator |
| A8286SETTR-T | 功能描述:IC REG LNB SUPPLY/CONTROL 28-MLP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
| A8286SETTR-TB | 制造商:ALLEGRO 制造商全称:Allegro MicroSystems 功能描述:Dual LNB Supply and Control Voltage Regulator |
| A8286SLBTR-T | 制造商:Allegro MicroSystems LLC 功能描述: |
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