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| 型号： | A8436EEJTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 13/16页 |
| 文件大小： | 0K |
| 描述： | IC PHOTOFLASH CHARGER 10-MLP |
| 标准包装： | 1 |
| 应用： | 照相机闪光灯电容器充电器 |
| 电流 - 电源： | 1.3mA |
| 电源电压： | 3 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-WFDFN 裸露焊盘 |
| 供应商设备封装： | 10-TDFN/MLP（3x3） |
| 包装： | 标准包装 |
| 产品目录页面： | 1141 (CN2011-ZH PDF) |
| 其它名称： | 620-1098-6 |
A8436
Photoflash Capacitor Charger with IGBT Driver
Applications Information
V OUT + V D_Drop
300 × 10 ? 9 × V OUT
L Primary ≥
Transformer Design
Turns Ratio. The minimum transformer turns ratio, N,
(Secondary:Primary) should be chosen based on the following
formula:
N ≥ (2)
40 ? V BATT
where:
V OUT (V) is the required output voltage level,
V D_Drop (V) is the forward voltage drop of the output diode(s),
V BATT (V) is the transformer battery supply, and
40 (V) is the rated voltage for the internal MOSFET switch,
representing the maximum allowable reflected voltage from the
output to the SW pin.
For example, if V BATT is 3.5 V and V D_Drop is 1.7 V (which could
be the case when two high voltage diodes were in series), and the
desired V OUT is 320 V, then the turns ratio should be at least 8.9.
In a worst case, when V BATT is highest and V D_Drop and V OUT are
at their maximum tolerance limit, N will be higher. Taking V BATT
= 5.5 V, V D_Drop = 2 V, and V OUT = 320 V × 102 % = 326.4 V as
the worst case condition, N can be determined to be 9.5.
In practice, always choose a turns ratio that is higher than the
calculated value to give some safety margin. In the worst case
example, a minimum turns ratio of N = 10 is recommended.
Primary Inductance . The A8436 has a minimum switch off-time,
t OFF(min) , of 300 ns, to ensure correct SW node voltage sensing.
As a loose guideline when choosing the primary inductance,
L Primary ( μ H), use the following formula:
. (3)
N × I SWLIM
Ideally, the charging time is not affected by transformer primary
inductance. In practice, however, it is recommended that a
primary inductance be chosen between 10 μ H and 20 μ H. When
L Primary is much lower than 10 μ H, the converter operates at
higher frequency, which increases switching loss proportionally.
This leads to lower efficiency and longer charging time. When
L Primary is greater than 20 μ H, the rating of the transformer must
be dramatically increased to handle the required power density,
and the series resistances are usually higher. A design that is
optimized to achieve a small footprint solution would have an
L Primary of 12 to 14 μ H, with minimized leakage inductance and
secondary capacitance, and minimized primary and secondary
series resistance. Please refer to the table Recommended
Components for more information.
Leakage Inductance and Secondary Capacitance. The trans-
former design should minimize the leakage inductance to ensure
the turn-off voltage spike at the SW node does not exceed the
40 V limit. An achievable minimum leakage inductance for this
application, however, is usually compromised by an increase in
parasitic capacitance. Furthermore, the transformer secondary
capacitance should be minimized. Any secondary capacitance is
multiplied by N 2 when reflected to the primary, leading to high
initial current swings when the switch turns on, and to reduced
efficiency.
V BATT 1.5 to 5.5 V
T1
V BIAS 3.0 to 5.5 V
Two Alkaline/NiMH/NiCAD or one Li +
D1
V OUT
Symbol
C1
Rating
0.1 μ F, X5R or X7R, 10 V
R5
100 k
R4
10 k
VIN
ILIM
C1
0.1 μ F
SW
FB
C2
4.7 μ F
R1
150 k
R2
150 k
COUT
100 μ F
330 V
C2
D1
T1
4.7 μ F, X5R or X7R, 10 V
Fairchild Semiconductor BAV23S
(dual diode connected in series)
Tokyo Coil Engineering T-16-024A,
L Primary = 12 μ H, N = 10.2
DONE
A8436
R3
1.2 k
R1, R2
1206 resistors, 1 %
R6
10 k
R7
10 k
CHARGE
TRIGGER
GND
IGBTDRV
To IGBT Gate
R3
R4, R5
0603 resistor, 1 %
Pull-up resistors
Figure 6. Typical circuit for photoflash application. Configured for I SWLIM of 1.4 A.
R6, R7
Pull-down resistors
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1 . 508.853.5000; www.allegromicro.com
12
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