参数资料
型号: A8447SLJTR-T
厂商: Allegro Microsystems Inc
文件页数: 5/9页
文件大小: 0K
描述: IC REG BUCK ADJ 3A 8SOIC
标准包装: 1
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 24 V
输入电压: 8 V ~ 50 V
PWM 型: 电流模式
电流 - 输出: 3A
同步整流器:
工作温度: -20°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm Width)裸露焊盘
包装: 标准包装
供应商设备封装: 8-SOIC-EP
产品目录页面: 1142 (CN2011-ZH PDF)
其它名称: 620-1174-6
A8447
High Voltage Step Down Regulator
Functional Description
? 1– 0.03 × V BIAS ?
t OFF = R TSET ? ? ,
?
?
TheA8447 is a fixed off-time, current mode controlled, buck
regulator. The regulator requires an external clamping diode,
inductor, and filter capacitor. It operates in both continuous and
discontinuous modes. An internal blanking circuit is used to filter
out transients resulting from the reverse recovery of the external
clamp diode. Typical blanking time is 200 ns.
The value of a resistor between the TSET and GND determines
the fixed off-time (see graph in the t OFF section).
V OUT . The output voltage is adjustable from 0.8 to 24 V, set by an
external resistor divider. The voltage can be calculated with the
following formula:
V OUT = V FB × (1 + R1/R2) (1)
Light Load Regulation. To maintain voltage regulation during
light load conditions, the switching regulator enters a cycle-skip-
ping mode. As the output current decreases, there remains some
energy that is stored during the power switch minimum on-time.
In order to prevent the output voltage from rising, the regulator
skips cycles once it reaches the minimum on-time, effectively
making the off-time larger.
Soft Start. An internal ramp generator and counter allow the out-
put to slowly ramp up. This limits the maximum demand on the
external power supply by controlling the inrush current required
to charge the external capacitor and any dc load at startup.
of the following fault conditions:
? V IN < 6 V
? ENB pin = open circuit
? TSD fault
When the device comes out of a TSD fault, it will go into a soft
start to limit inrush current.
t OFF . The value of a resistor between the TSET pin and ground
determines the fixed off-time. The formula to calculate t OFF ( μ s)
is:
(2)
10.2 × 10 9
where R TSET (k Ω ) is the value of the resistor. Results are shown
Off-Time Setting versus Resistor Value
200
180
160
140
V BIAS = 5 V
120
V BIAS = 3.3 V
100
80
60
40
20
Internally, the ramp is set to 10 ms nominal rise time. During soft
start, current limit is 3.5 A minimum.
The following conditions are required to trigger a soft start:
0
1
2
3
4
5
6
7 8 9
t OFF (μs)
10
11 12 13 14 15
16
? V IN > 6 V
? ENB pin input falling edge
? Reset of a TSD (thermal shut down) event
V BIAS . To improve overall system efficiency, the regulator output,
V OUT , is connected to the VBIAS input to supply the operating
bias current during normal operating conditions. During startup
the circuitry is run off of the VIN supply. VBIAS should be con-
nected to VOUT when the V OUT target level is between 3.3 and
5 V. If the output voltage is less than 3.3 V, then the A8447 can
operate with an internal supply and pay a penalty in efficiency,
as the bias current will come from the high voltage supply, VIN.
VBIAS can also be supplied with an external voltage source. No
power-up sequencing is required for normal operation.
in the following graph:
The R TSET resistor should be not smaller than 7.65 k Ω ±2% to
prevent very short off-times from violating the minimum on-time
of the switcher.
Shorted Load. If the voltage on the FB pin falls below 0.4 V, the
regulator will invoke a 1.5 A typical overcurrent limit to handle
the shorted load condition at the regulator output. For low output
voltages at power up and in the case of a shorted output, the off-
time is extended to prevent loss of control of the current limit due
to the minimum on-time of the switcher.
The extension of the off-time is based on the value of the TSET
multiplier and the FB voltage, as shown in the following table:
ON/OFF Control. The ENB pin is externally pulled to ground
to enable the device and begin the soft start sequence. When the
ENB is open circuited, the switcher is disabled and the output
decays to 0 V.
Protection. The buck switch will be disabled under one or more
V FB (V)
< 0.16
< 0.32
< 0.5
> 0.5
TSET Multiplier
8 × t OFF
4 × t OFF
2 × t OFF
t OFF
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
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