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| 型号： | A8499SLJTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 5/7页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 2A 8SOIC |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 1.2 V ~ 24 V |
| 输入电压： | 8 V ~ 50 V |
| PWM 型： | 电流模式 |
| 电流 - 输出： | 2A |
| 同步整流器： | 无 |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm Width）裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 8-SOIC-EP |
| 其它名称： | 620-1102-6 |
A8499
The switching frequency is calculated as follows:
High Voltage Step-Down Regulator
to the minimum on-time of the switcher.
f SW =
1
t ON + t OFF
(4)
The extension of the off-time is based on the value of the TSET
multiplier and the FB voltage, as shown in the following table:
V FB (V) TSET Multiplier
Shorted Load. If the voltage on the FB pin falls below 0.5 V, the
regulator will invoke a 0.8 A typical overcurrent limit to handle
shorted load condition at the regulator output. For low output
voltages at power up and in the case of a shorted output, the off-
time is extended to prevent loss of control of the current limit due
Component Selection
< 0.25
< 0.50
< 0.75
> 0.75
8 × t OFF
4 × t OFF
2 × t OFF
t OFF
L1. The inductor must be rated to handle the total load current.
The value should be chosen to keep the ripple current to a reason-
able value. The ripple current, I RIPPLE , can be calculated by:
Higher inductor values can be chosen to lower the ripple cur-
rent. This may be an option if it is required to increase the total
maximum current available above that drawn from the switching
I RIPPLE = V L(OFF) × t OFF / L
V L(OFF) = V OUT + V f + I L(AVG) × R L
Example:
(5)
(6)
regulator. The maximum total current available, I LOAD(MAX) , is:
I LOAD(MAX) = I CL(MIN) × t OFF / L (5)
where I CL(MIN) is 2.2 A, from the Electrical Chracteristics table.
Given V OUT = 5 V, V f = 0.55 V, V IN = 42 V, I LOAD = 0.5 A, power
inductor with L = 180 μ H and R L = 0.5 Ω Rdc at 55°C, t OFF =
7 μ s, and R DS(on) = 1 Ω .
Substituting into equation 6:
V L(OFF) = 5 V + 0.55 V+ 0.5 A × 0.5 Ω = 5.8 V
Substituting into equation 5:
I RIPPLE = 5.8 V × 7 μ s / 180 μ H = 225 mA
The switching frequency, f SW , can then be estimated by:
D1. The Schottky catch diode should be rated to handle 1.2 times
the maximum load current. The voltage rating should be higher
than the maximum input voltage expected during all operating
conditions. The duty cycle for high input voltages can be very
close to 100%.
COUT. The main consideration in selecting an output capacitor
is voltage ripple on the output. For electrolytic output capacitors,
a low-ESR type is recommended.
The peak-to-peak output voltage ripple is simply I RIPPLE × ESR.
Note that increasing the inductor value can decrease the ripple
f SW = 1 / ( t ON + t OFF )
t ON = I RIPPLE × L / V L(ON)
(7)
(8)
current. The ESR should be in the range from 50 to 500 m Ω .
RTSET Selection. Correct selection of RTSET values will
ensure that minimum on time of the switcher is not violated and
V L(ON) = V IN – I L(AVG) × R DS(on) – I L(AVG) × R L – V OUT (9)
Substituting into equation 9:
V L(ON) = 42 V – 0.5 A × 1 Ω – 0.5 A × 0.5 Ω – 5 V = 36 V
Substituting into equation 8:
t ON = 225 mA × 180 μ H / 36 V = 1.12 μ s
Substituting into equation 7:
f SW = 1 / (7 μ s +1.12 μ s) = 123 kHz
prevent the switcher from cycle skipping. For a given V IN to
V OUT ratio, the RTSET value must be greater than or equal to the
value defined by the curve in the chart RTSET Value versus V IN /
V OUT , on the next page.
Note. The curve represents the minimum RTSET value. When
calculating R TSET , be sure to use V IN (max) / V OUT (min). Resistor
tolerance should also be considered, so that under no operating
conditions the resistance on the TSET pin is allowed to go below
the minimum value.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
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