参数资料
型号: A8508GLPTR-T
厂商: Allegro Microsystems Inc
文件页数: 15/28页
文件大小: 0K
描述: IC LED DVR WHITE 8X120MA 24TSSOP
标准包装: 8,000
拓扑: PWM,SEPIC,升压(升压)
输出数: 8
内部驱动器:
类型 - 主要: 背光
类型 - 次要: 白色 LED
频率: 300kHz ~ 800kHz
电源电压: 9 V ~ 40 V
安装类型: 表面贴装
封装/外壳: 24-TSSOP(0.173",4.40mm)裸露焊盘
供应商设备封装: 24-TSSOP 裸露焊盘
包装: 带卷 (TR)
工作温度: -40°C ~ 105°C
A8508
LED Open Detect
Wide Input Voltage Range, High Efficiency
8-Channel Fault Tolerant LED Driver
extended view of the same situation. Figure 27 shows an OVP
When any LED string opens, the boost control circuit increases
the output voltage until it reaches the overvoltage protection
level. The OVP event causes any LED string that is below regula-
tion level to be disabled. After disabling the open string, the
output voltage returns to normal operating voltage. An EN low
signal will reset the LED string regulation lock.
Figure 25 shows a typical overvoltage condition when the output
voltage is disconnected from the LED load. Figure 26 shows an
condition created by a single open LED string.
Undervoltage Protection (UVP)
If the output voltage is shorted to ground the OVP pin will sense
an undervoltage condition (UVP). When UVP is sensed, the IC
sets the Fault ? ag low which, if used to interface to the output-
disconnect switch, will shut off the P-FET device. Figure 28 is a
schematic showing the input disconnect switch implementation.
OVP limit is reached,
V OUT
OVP level
and string is removed
from control loop
C2
C1
I OUT
V COMP
Fault occurrence
C2
V OUT (30 V)
V LEDx
LED string opens
Control loop reduces V OUT
to new regulation level
C3
V COMP begins to decrease
C3
I OUT
t
Figure 25. OVP operation with all LEDx pins open. V OUT rises to the
overvoltage level and stays there until the IC is shut down; shows V OUT
(ch1, 20 V/div.), I OUT (ch2, 1 A/div.), and V COMP (ch3, 2 V/div.),
t = 2 ms/div.
t
Figure 27. OVP condition created by an open LED string; shows V OUT
(ch1, 2 V/div.), pin voltage V LEDx (ch2, 5 V/div.), and I OUT (ch3,
200 mA/div.), t = 2 ms/div.
C2
C1
V OUT
I OUT
OVP level
Periodic switch node
bursts occur when all
V IN
V DR
AO4421
10 k Ω
L1
C IN (optional)
C3
V COMP
V SW
LEDx pins are open
1 k Ω
1 k Ω
2N7002
A8508
FAULT
C4
t
Figure 26. Extended view of the OVP condition in figure 25; shows V OUT
(ch1, 20 V/div.), I OUT (ch2, 1 A/div.), V COMP (ch3, 1 V/div.), and switch node
(V SW ) (ch4, 20 V/div.), t = 10 ms/div.
Figure 28. Simplified schematic of an external disconnect switch
implementation.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
15
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