参数资料
型号: AB-142
英文描述: AB-142 - ADS7843 PEN INTERRUPT
中文描述: 抗体- 142 - ADS7843笔中断
文件页数: 2/2页
文件大小: 50K
代理商: AB-142
2
Figure 2 shows a simplified schematic of the ADS7843 front
end while using the PENIRQ. The resistive touch-screen is
represented with the row and column of series resistors
between the X and Y inputs. The switch, S1, models a
dynamic short that moves across the X and Y resistive touch-
screen axes like the tip of a PDA pen. S1 also models where
the tip of the PDA pen initially shorts the two resistive layers
together. I/O1 and I/O2 are general purpose input/output
ports from the MPU. I/O2 must be able to sense a change in
potential when powered down.
Be sure to note that the ADC will not start in the power-down
mode when power is applied to the system. Instead, the
MPU must write zeros into PD0 and PD1—two bits of the
Control Byte register. After the ADS7843 enters the power-
down mode, the Y-MOSFET provides a path for current flow
when the touch-screen is depressed. The other three
MOSFETs for X+, X–, and Y+ are in a high impedance state
during the power-down mode. When the PDA pen depresses
the touch-screen, current flows through the 100k
resistor
and the interrupt diode. Once PENIRQ is pulled LOW, a
voltage typically not exceeding 0.65V is sensed at I/O2. At
that time, the MPU should wake up, pull I/O1 and I/O2
LOW, then write a byte to the ADS7843 Control Byte
register to initiate a conversion. The MPU must drive I/O1
and I/O2 LOW in order to reverse bias the PENIRQ diode.
Otherwise, if the diode is forward-biased during a conver-
sion, the additional current will cause the input data to be
inaccurate. To complete the control cycle, the MPU writes
the corresponding power-down bits to the ADS7843 Control
Byte after the PDA has no inputs for a minute or two,
depending on the time allotted prior to the power-down
operation.
100k
S
1
PENIRQ
X+
Y+
X–
Y–
I/O1
I/O2
ADS7843
V
CC
FIGURE 2. Simplified PENIRQ Architecture.
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