参数资料
型号: AB-150
英文描述: AB-150 - CREATING A BIPOLAR INPUT RANGE FOR THE DDC112
中文描述: 抗体- 150 -创造DDC112阿双极输入范围
文件页数: 2/5页
文件大小: 78K
代理商: AB-150
2
For example, consider a DDC112 configured with a Range
and T
INT
equal to 250pC and 500
μ
s respectively. A 20M
offset resistor connected to 4.1V results in a positive full
scale of 147.5pC, a negative full-scale of –103.5pC. When
the input signal is zero, the DDC112 output code reads
90,079. Figure 3 shows the DDC112's output code versus
signal level for this example. In general, the output code
with a zero input signal is
where Q
FS
is the selected Range.
Remember, however, that during the A/D conversions, V
REF
is sampled by the DDC112, which tends to produce glitches
on this node. For a single DDC112 system, using Figure 4’s
op amp buffer and large bypass capacitors reduces the glitches
sufficiently so that V
REF
can also directly drive the resistor.
But, for multiple DDC112 systems, the glitches will be larger
and may interfere with generating the offset currents. In that
case, use a separate buffer to drive the resistors as shown in
Figure 5. If V
REF
(typically 4.1V) is too large of a voltage, use
a resistor voltage divider as shown in Figure 6. Keep the sum
of the resistor values large enough as not to load the op amp;
(R
1
+ R
2
) > 100k
should be fine. Additionally, use a
capacitor in parallel with R
2
to help lowpass filter the noise on
that node. And finally, it is a good idea to place the resistor as
close to the DDC112’s input as possible and to surround it
with ground shielding. The input is very susceptible to pickup.
Keeping it short and shielded can dramatically reduce cou-
pling from 60Hz and other sources.
There are a few things to mention about the circuit in
Figure 2. First, use a large resistor, preferably greater than
10M
. A large resistor better approximates an ideal current
source and actually helps reduce the thermal noise seen at the
DDC112’s output (discussed in more detail in the last section).
The voltage coefficient of the resistor doesn’t matter, but the
temperature coefficient may, if the offset drift over tempera-
ture is a concern. In most cases, Caddock’s MK632 series of
high valued resistors are a good choice. Second, a convenient
voltage for the resistor is the V
REF
signal used by the DDC112,
see Figure 4.
FIGURE 3. DDC112 Output Code vs Input Signal with
Offset Applied.
FIGURE 5. Typical Circuit Implementation to Add Offset
When Using Multiple DDC112s.
R
Current from Sensor
10
μ
F
10
μ
F
To other DDC112s
0.1
μ
F
OPA2350
V
REF
IN
DDC112
To other Resistors
V
REF
OPA2350
V
REF
R
Current from Sensor
10
μ
F
0.1
μ
F
OPA350
V
REF
IN
DDC112
FIGURE 4. Typical Circuit Implementation to Add Offset.
FIGURE 6. Resistor Divider to Reduce Voltage Applied to
Offset Resistor.
1
μ
F
OPA350
IN
R
R
1
R
2
DDC112
Current from Sensor
V
REF
10
μ
F
Output Code
V
RT
Q
ZEROINPUT
INT
FS
=
+
(
)
4096
2
1
20
(1)
+Full Scale = 147.5pC
FFFFFh = 1,048,575
INPUT SIGNAL
DDC112 OUTPUT CODE
Zero
69F5Ch = 434,012
T
= 500
μ
s
Range = 250pC
R = 20M
V = 4.1V
–Full Scale = –103.5pC
00000h
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