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参数资料
| 型号： | ACPL-072L-500E |
| 元件分类： | 光电耦合器 |
| 英文描述： | 1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 25 Mbps |
| 封装： | ROHS COMPLIANT, SURFACE MOUNT, SOP-8 |
| 文件页数： | 10/11页 |
| 文件大小： | 286K |
| 代理商： | ACPL-072L-500E |
8
Table 6. Switching Specifications
Test conditions that are not specified can be anywhere within the recommended operating range.
The following specifications cover the following power supply combinations: (4.5V≤VDD1≤5.5V, 4.5V≤VDD2≤5.5V),
(3V≤VDD1≤3.6V, 3V≤VDD2≤3.6V), (4.5V≤VDD1≤5.5V, 3V≤VDD2≤3.6V) and (3V≤VDD1≤3.6V, 4.5V≤VDD2≤5.5V).
All typical specifications are at TA=+25°C, VDD1 = VDD2 = +3.3V.
Parameter
Symbol
Min.
Typ.
Max.
Units
Test Conditions
Propogation Delay Time
to Logic Low Output [3]
tPHL
23.5
40
ns
CL = 15 pF, CMOS Signal Levels
Propogation Delay Time
to Logic High Output [3]
tPLH
25.5
40
ns
CL = 15 pF, CMOS Signal Levels
Pulse Width [4]
tPW
40
ns
CL = 15 pF, CMOS Signal Levels
Maximum Data Rate [5]
25
MBd
CL = 15 pF, CMOS Signal Levels
Pulse Width Distortion [6]
| tPHL - tPLH |
|PWD |
2
6
ns
CL = 15 pF, CMOS Signal Levels
Propagation Delay Skew [7]
tPSK
20
ns
CL = 15 pF, CMOS Signal Levels
Output Rise Time
(10% – 90%)
tR
9
ns
CL = 15 pF, CMOS Signal Levels
Output Fall Time
(90% - 10%)
tF
8
ns
CL = 15 pF, CMOS Signal Levels
Common Mode Transient
Immunity at Logic High Output [8]
| CMH |
10
20
kV/ms
VCM = 1000 V, TA = 25°C,
VI = VDD1, VO > 0.8 VDD1
Common Mode Transient
Immunity at Logic Low Output [8]
| CML |
10
20
kV/ms
VCM = 1000 V, TA = 25°C,
VI = 0 V, VO < 0.8 V
Table 7. Package Characteristics
All typical specifications are at TA = 25°C.
Parameters
Symbol
Min.
Typ.
Max.
Units
Test Conditions
Input-Output Momentary
With-stand Voltage [7,8,9]
072L
VISO
3750
V rms
RH ≤ 50%, t = 1 min, TA = 25°C
772L
3750
772L with
020 option
5000
Input-Output Resistance [9]
R I-O
1012
W
V I-O = 500 V dc
Input-Output Capacitance
C I-O
0.6
pF
f = 1 MHz
Input Capacitance [12]
C I
3.0
pF
Input IC Junction-to-Case
Thermal Resistance
772L
qjci
145
°C/W
Thermocouple located at center
underside of package
072L
160
Output IC Junction-to-Case
Thermal Resistance
772L
qjco
140
°C/W
072L
135
Package Power Dissipation
PPD
150
mW
Notes:
1. Absolute Maximum ambient operating temperature means the device will not be damaged if operated under these conditions. It does not
guarantee functionality.
2. The LED is ON when VI is low and OFF when VI is high.
3. tPHL propagation delay is measured from the 50% level on the falling edge of the VI signal to the 50% level of the falling edge of the VO signal. tPLH
propagation delay is measured from the 50% level on the rising edge of the VI signal to the 50% level of the rising edge of the VO signal.
4. The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
5. The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
6. PWD is defined as |tPHL - tPLH|. %PWD (percent pulse width distortion) is equal to the PWD divided by pulse width.
7. tPSK is equal to the magnitude of the worst case difference in tPHL and/or tPLH that will be seen between units at any given temperature within the
recommended operating conditions.
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