参数资料
型号: ACPL-560KLOPTION-100
元件分类: 光电耦合器
英文描述: 1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 10 Mbps
封装: HERMETIC SEALED, DIP-8
文件页数: 10/11页
文件大小: 363K
代理商: ACPL-560KLOPTION-100
8
Notes:
1. Eachchannel.
2. All devices are considered two-terminal devices; I
I-O is measured between all input leads or terminals shorted together and all output
leadsorterminalsshortedtogether.
3. Measuredbetweeneachinputpairshortedtogetherandalloutputconnectionsforthatchannelshortedtogether.
4. Measuredbetweenadjacentinputpairsshortedtogetherforeachmultichanneldevice.
5. t
PHL propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.5V point on the leading edge of
the output pulse.The t
PLH propagation delay is measured from the 50% point on the trailing edge of the input pulse to the 1.5 V point
onthetrailingedgeoftheoutputpulse.
6. CM
L is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage in the logic low state
(V
O<0.8 V). CMH is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in the logic
highstate(V
O > 2.0V).
7. Thisisamomentarywithstandtest,notanoperatingcondition.
8. Itisessentialthatabypasscapacitor(0.01to0.1F,ceramic)beconnectedfromV
CC to ground. Total lead length between both ends of
thisexternalcapacitorandtheisolatorconnectionsshouldnotexceed20mm.
9. Noexternalpullupisrequiredforahighlogicstateontheenableinput.
10. Thet
ELH enable propagation delay is measured from the 1.5 V point on the trailing edge of the enable input pulse to the 1.5 V point on
thetrailingedgeoftheoutputpulse.
11. Thet
EHL enable propagation delay is measured from the 1.5 V point on the leading edge of the enable input pulse to the 1.5 V point on
theleadingedgeoftheoutputpulse.
12. Standard commercial parts receive 100% testing at 25°C (Subgroups 1 and 9). Class H and K parts receive 100% testing at 25, 125, and
-55°C(Subgroups1and9,2and10,3and11,respectively).
13. Parametersaretestedaspartofdeviceinitialcharacterizationandafterdesignandprocesschanges.Parametersareguaranteedtolimits
specifiedforalllotsnotspecificallytested.
Figure 1. High Level Output Current vs. Tempera-
ture.
Figure 2. Input-Output Characteristics.
Figure 3. Input Diode Forward Characteristics.
0
20
40
60
80
100
-60 -40 -20 0 20 40 60 80 100 120 140
TA - TEMPERATURE - °C
IO
H
-H
IG
H
LE
VE
LO
UT
PU
TC
UR
RE
NT
-u
A
VCC = 3.3 V
VO = 3.3 V
IF = 250 A
0
1
2
3
4
5
1
2
3
4
5
6
7
IF - INPUT DIODE FORWARD CURRENT - mA
VO
-O
UT
PU
TV
OL
TA
GE
-V
510
1 k
4 k
RL
VCC = 3.3 V
TA = 25 °C
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