- 您现在的位置：买卖IC网 > PDF目录9516 > AD2S1210WDSTZRL7 (Analog Devices Inc)IC CONV R/D VAR REF OSC 48LQFP PDF资料下载
参数资料
| 型号： | AD2S1210WDSTZRL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 26/36页 |
| 文件大小： | 0K |
| 描述： | IC CONV R/D VAR REF OSC 48LQFP |
| 标准包装： | 1 |
| 类型： | R/D 转换器 |
| 分辨率（位）： | 10，12，14，16 b |
| 数据接口： | 串行，并联 |
| 电压电源： | 模拟和数字 |
| 电源电压： | 4.75 V ~ 5.25 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 标准包装 |
| 其它名称： | AD2S1210WDSTZRL7DKR |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页当前第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页
AD2S1210
Rev. A | Page 32 of 36
CIRCUIT DYNAMICS
LOOP RESPONSE MODEL
0
74
67
-03
7
ERROR
(ACCELERATION)
–
θIN
θOUT
VELOCITY
k1 × k2
1 – z–1
1 – bz–1
1 – z–1
c
1 – az–1
c
Sin/Cos LOOKUP
Figure 38. RDC System Response Block Diagram
The RDC is a mixed-signal device that uses two ADCs to digitize
signals from the resolver and a Type II tracking loop to convert
these to digital position and velocity words.
The first gain stage consists of the ADC gain on the sine/cosine
inputs and the gain of the error signal into the first integrator.
The first integrator generates a signal proportional to velocity.
The compensation filter contains a pole and a zero that are used
to provide phase margin and reduce high frequency noise gain.
The second integrator is the same as the first and generates the
position output from the velocity signal. The sin/cos lookup has
unity gain. The values for the k1, k2, a, b, and c parameters are
outlined in Table 28.
The following equations outline the transfer functions of the
individual blocks as shown in Figure 38, which then combine to
form the complete RDC system loop response.
Integrator1 and Integrator2 transfer function
1
)
(
=
z
c
z
I
(10)
Compensation filter transfer function
1
)
(
=
bz
az
z
C
(11)
RDC open-loop transfer function
)
(
)
(
)
(
2
z
C
z
I
k2
k1
z
G
×
=
(12)
RDC closed-loop transfer function
)
(
1
)
(
)
(
z
G
z
G
z
H
+
=
(13)
The closed-loop magnitude and phase responses are that of a
To convert G(z) into the s-plane, an inverse bilinear transforma-
tion is performed by substituting the following equation for z:
s
t
s
t
z
+
=
2
(14)
where t is the sampling period (1/4.096 MHz ≈ 244 ns).
Substitution yields the open-loop transfer function, G(s).
)
1
(
2
)
1
(
1
)
1
(
2
)
1
(
1
4
1
)
1
(
)
(
2
b
t
s
a
t
s
t
s
st
b
a
k2
k1
s
G
+
×
+
+
×
+
×
+
×
×
=
(15)
This transformation produces the best matching at low frequencies
(f < fSAMPLE). At such frequencies (within the closed-loop
bandwidth of the AD2S1210), the transfer function can be
simplified to
2
1
2
1
)
(
st
s
K
s
G
a
+
×
(16)
where:
b
a
k2
k1
K
b
t
a
t
a
×
=
+
=
+
=
)
1
(
)
1
(
2
)
1
(
)
1
(
2
)
1
(
2
1
Table 28. RDC System Response Parameters
Parameter
Description
10-bit resolution
12-bit resolution
14-bit resolution
16-bit resolution
k1 (nominal)
ADC gain
1.8/2.5
k2
Error gain
6 × 106 × 2
π
18 × 106 × 2
π
82 x 106 × 2
π
66 × 106 × 2
π
a
Compensator zero coefficient
8187/8192
4095/4096
8191/8192
32,767/32,768
b
Compensator pole coefficient
509/512
4085/4096
16,359/16,384
32,757/32,768
c
Integrator gain
1/1,024,000
1/4,096,000
1/16,384,000
1/65,536,000
相关PDF资料 |
PDF描述 |
|---|---|
| MS27484T20F39PA | CONN PLUG 39POS STRAIGHT W/PINS |
| MS27472T18B32SC | CONN RCPT 32POS WALL MT W/SCKT |
| VE-B51-IU-S | CONVERTER MOD DC/DC 12V 200W |
| VE-B5Y-MY-S | CONVERTER MOD DC/DC 3.3V 33W |
| VI-B5L-IU-S | CONVERTER MOD DC/DC 28V 200W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD2S34SZ10 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Resolver-to-Digital Converter |
| AD2S34SZ10B | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Resolver-to-Digital Converter |
| AD2S34SZ40 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Resolver-to-Digital Converter |
| AD2S34SZ40B | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Resolver-to-Digital Converter |
| AD2S34SZ60 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Resolver-to-Digital Converter |
发布紧急采购，3分钟左右您将得到回复。