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参数资料
型号： AD5252EVAL
厂商： Analog Devices, Inc.
元件分类： 通用总线功能
英文描述： 32-Tap. Nonvolatile. Linear-Taper Digital Potentiometers in SOT23
中文描述： 32抽头、非易失、线性变化数字电位器，SOT23封装
文件页数： 6/28页
文件大小： 859K
代理商： AD5252EVAL
AD5251/AD5252
Parameter
Dual-Supply Power Range
Positive Supply Current
Negative Supply Current
Rev. 0 | Page 6 of 28
Symbol
V
DD
/V
SS
I
DD
I
SS
Conditions
V
IH
= V
DD
or V
IL
= GND
V
IH
= V
DD
or V
IL
= GND, V
DD
= +2.5 V, V
SS
= -2.5 V
V
IH
= V
DD
or V
IL
= GND, T
A
= 0°C to 85°C
Min
±2.25
Typ
1
5
5
Max
±2.75
15
15
Unit
V
μA
μA
EEMEM Data Storing Mode
Current
EEMEM Data Restoring Mode
Current
6
Power Dissipation
7
Power Supply Sensitivity
I
DD_STORE
35
mA
I
DD_RESTORE
V
IH
= V
DD
or V
IL
= GND, T
A
= 0°C to 85°C
2.5
mA
P
DISS
PSS
BW
THD
W
t
S
V
IH
= V
DD
= 5 V or V
IL
= GND
V
DD
= 5 V ±10%
V
DD
= 3 V ±10%
R
AB
= 10 k/50 k/100 k
V
A
= 1 Vrms, V
B
= 0 V, f = 1 kHz
V
A
= V
DD
, V
B
= 0 V, R
AB
= 10 k/50
k/100 k
10 k/50 k/100 k, code = midscale,
f = 1 kHz (thermal noise only)
V
A
= V
DD
, V
B
= 0 V, Measure V
W
with
adjacent RDAC making full scale
change
Signal input at A1 and measure output
at W3, f = 1kHz
0.005
0.01
+0.002
+0.002
400/80/40
0.05
1.5/7/14
0.075
+0.005
+0.01
mW
%/%
%/%
kHz
%
μs
DYNAMIC CHARACTERISTICS
5,
–3 dB Bandwidth
Total Harmonic Distortion
V
W
Settling Time
Resistor Noise Voltage
e
N_WB
9/20/29
nV/√Hz
Digital Crosstalk
C
T
-80
dB
Analog Coupling
C
AT
-72
dB
1
Typical represents the average reading at 25°C and V
DD
= 5 V.
2
Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic, except R-DNL of AD5252
1 k
version at V
DD
= 2.7 V, I
W
= V
DD
/R for both V
DD
= 3 V or V
DD
= 5 V.
3
INL and DNL are measured at V
W
with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V
A
= V
DD
and V
B
= 0 V. DNL
specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.
4
Resistor Terminals A, B, and W have no limitations on polarity with respect to each other.
5
Guaranteed by design and not subject to production test.
6
cmd 0 NOP should be activated after cmd 1 to minimize I
DD_READ
current consumption.
7
P
DISS
is calculated from I
DD
× V
DD
= 5 V.
8
All dynamic characteristics use V
DD
= 5 V.
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AD5253EVAL Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers
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