参数资料
型号: AD5258BRMZ1-R71
厂商: Analog Devices, Inc.
元件分类: 数字电位计
英文描述: Nonvolatile, I2C-Compatible 64-Position, Digital Potentiometer
中文描述: 非易失,I2C兼容的64工位,数字电位器
文件页数: 5/24页
文件大小: 1299K
代理商: AD5258BRMZ1-R71
AD5258
TIMING CHARACTERISTICS
V
DD
= V
LOGIC
= 5 V ± 10%, or 3 V ± 10%; V
A
= V
DD
; V
B
= 0 V; 40°C < T
A
< +85°C, unless otherwise noted.
Table 2.
Parameter
Symbol
I
2
C INTERFACE TIMING CHARACTERISTICS
SCL Clock Frequency
f
SCL
t
BUF
Bus Free Time between STOP and START
t
1
t
HD;STA
Hold Time (Repeated START)
t
2
Rev. 0 | Page 5 of 24
Conditions
After this period, the first clock pulse is
generated.
Min
0
1.3
0.6
Typ
Max
400
Unit
kHz
μs
μs
t
LOW
Low Period of SCL Clock
t
HIGH
High Period of SCL Clock
t
SU;STA
Setup Time for Repeated START
Condition
t
HD;DAT
Data Hold Time
t
SU;DAT
Data Setup Time
t
F
Fall Time of Both SDA and SCL Signals
t
R
Rise Time of Both SDA and SCL Signals
t
SU;STO
Setup Time for STOP Condition
EEPROM Data Storing Time
EEPROM Data Restoring Time at Power On
1
t
3
t
4
t
5
1.3
0.6
0.6
μs
μs
μs
t
6
t
7
t
8
t
9
t
10
t
EEMEM_STORE
t
EEMEM_RESTORE1
V
DD
rise time dependant. Measure
without decoupling capacitors at V
DD
and
GND.
V
DD
= 5 V.
0
100
0.6
26
300
0.9
300
300
μs
ns
ns
ns
μs
ms
μs
EEPROM Data Restoring Time upon Restore
Command
1
EEPROM Data Rewritable Time
2
FLASH/EE MEMORY RELIABILITY
Endurance
3
Data Retention
4
t
EEMEM_RESTORE2
300
μs
t
EEMEM_REWRITE
100
540
700
100
μs
kCycles
Years
1
During power-up, the output is momentarily preset to midscale before restoring EEPROM content.
2
Delay time after power-on PRESET prior to writing new EEPROM data.
3
Endurance is qualified to 100,000 cycles per JEDEC Std. 22 method A117, and is measured at –40°C, +25°C, and +85°C; typical endurance at +25°C is 700,000 cycles.
4
Retention lifetime equivalent at junction temperature (T
J
) = 55°C per JEDEC Std. 22, Method A117. Retention lifetime based on an activation energy of 0.6eV derates
with junction temperature.
0
t
1
SCL
SDA
P
S
P
t
3
t
2
t
8
t
9
t
8
t
9
t
4
t
5
t
7
t
6
t
10
Figure 4. I
2
C Interface Timing Diagram
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