参数资料
| 型号： | AD526JNZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 14/14页 |
| 文件大小： | 0K |
| 描述： | IC AMP PGA 10MA 16DIP |
| 标准包装： | 25 |
| 放大器类型： | 可编程增益 |
| 电路数： | 1 |
| 转换速率： | 24 V/µs |
| -3db带宽： | 4MHz |
| 电流 - 输入偏压： | 50pA |
| 电压 - 输入偏移： | 400µV |
| 电流 - 电源： | 10mA |
| 电流 - 输出 / 通道： | 10mA |
| 电压 - 电源，单路/双路(±)： | ±4.5 V ~ 16.5 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 16-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 16-PDIP |
| 包装： | 管件 |
| 产品目录页面： | 770 (CN2011-ZH PDF) |
AD526
REV. D
–9–
The specifications on page 3, in combination with Figure 35,
give the timing requirements for loading new gain codes.
VALID DATA
GAIN CODE
INPUTS
CLK OR CS
TC
TH
TS
TC = MINIMUM CLOCK CYCLE
TS = DATA SETUP TIME
TH = DATA HOLD TIME
NOTE: THRESHOLD LEVEL FOR
GAIN CODE,
CS, AND CLK IS 1.4V.
Figure 35. AD526 Timing
TIMING AND CONTROL
Table I. Logic Input Truth Table
Gain Code
Control
Condition
A2 A1 A0 B
CLK (CS = 0)
Gain
Condition
XXXX
1
Previous State
Latched
0001
0
1
Transparent
0011
0
2
Transparent
0101
0
4
Transparent
0111
0
8
Transparent
1
X
1
0
16
Transparent
XXX0
0
1
Transparent
XXX0
1
Latched
0001
1
Latched
0011
1
2
Latched
0101
1
4
Latched
0111
1
8
Latched
1
X
1
16
Latched
NOTE: X = Don’t Care.
DIGITAL FEEDTHROUGH
With either
CS or CLK or both held high, the AD526 gain state
will remain constant regardless of the transitions at the A0, A1,
A2 or B inputs. However, high speed logic transitions will un-
avoidably feed through to the analog circuitry within the AD526
causing spikes to occur at the signal output.
This feedthrough effect can be completely eliminated by operat-
ing the AD526 in the transparent mode and latching the gain
code in an external bank of latches (Figure 36).
To operate the AD526 using serial inputs, the configuration
shown in Figure 36 can be used with the 74LS174 replaced by a
serial-in/parallel-out latch, such as the 54LS594.
OUT
FORCE
OUT
SENSE
VOUT
0.1 F
–VS
0.1 F
+VS
+5V
VIN
74LS174
1 F
B
A2
A0
A1
TIMING
SIGNAL
16
15
14
13
12
11
10
9
12
34
56
78
+
–
AD526
16
84
21
GAIN NETWORK
A1
A0
CS CLK
A2
B
LOGIC AND LATCHES
Figure 36. Using an External Latch to Minimize Digital
Feedthrough
相关PDF资料 |
PDF描述 |
|---|---|
| TSW-102-17-G-D | CONN HEADER 4POS .100" DUAL GOLD |
| TSW-130-07-T-S | CONN HEADER 30POS .100" SNGL TIN |
| TSW-116-07-L-S | CONN HEADER 16POS .100" SGL GOLD |
| 929836-09-01-RK | CONN HEADER .100 DUAL STR 2POS |
| LT1499IS#PBF | IC OP-AMP R-R IN/OUT QUAD 14SOIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD526S | 制造商:AD 制造商全称:Analog Devices 功能描述:Software Programmable Gain Amplifier |
| AD526SD | 功能描述:IC AMP PGA 10MA 16CDIP RoHS:否 类别:集成电路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 其它有关文件:TS1854A View All Specifications 标准包装:50 系列:- 放大器类型:通用 电路数:4 输出类型:满摆幅 转换速率:0.25 V/µs 增益带宽积:630kHz -3db带宽:- 电流 - 输入偏压:16nA 电压 - 输入偏移:1000µV 电流 - 电源:162µA 电流 - 输出 / 通道:48mA 电压 - 电源，单路/双路(±):1.8 V ~ 6 V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:14-SOIC（0.154"，3.90mm 宽） 供应商设备封装:14-SO 包装:管件 |
| AD526SD/883B | 制造商:Analog Devices 功能描述:SP Amp Variable Gain Amp Single ±16.5V 16-Pin SBCDIP Tube 制造商:Rochester Electronics LLC 功能描述:SOFTWARE PROG. GAIN AMP - Bulk |
| AD526SD/883B/QUP-3/GDLS | 制造商:Rochester Electronics LLC 功能描述:AD526SD/883B/QUP-3/GDLS - Bulk |
| AD526SD883B | 制造商:AD 制造商全称:Analog Devices 功能描述:Software Programmable Gain Amplifier |
发布紧急采购，3分钟左右您将得到回复。