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参数资料
| 型号： | AD5302BRM |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | DAC |
| 英文描述： | +2.5 V to +5.5 V, 230 uA Dual Rail-to-Rail, Voltage Output 8-/10-/12-Bit DACs |
| 中文描述： | SERIAL INPUT LOADING, 6 us SETTLING TIME, 8-BIT DAC, PDSO10 |
| 封装： | MO-187BA, MSOP-10 |
| 文件页数： | 2/16页 |
| 文件大小： | 207K |
| 代理商： | AD5302BRM |
REV. 0
–2–
AD5302/AD5312/AD5322–SPECIFICATIONS
(V
DD
= +2.5 V to +5.5 V; V
REF
= +2 V; R
L
= 2 k
V
to GND; C
L
= 200 pF to GND; all specifications T
MIN
to T
MAX
unless otherwise noted.)
B Version
2
Min
Parameter
1
Typ
Max
Units
Conditions/Comments
DC PERFORMANCE
3, 4
AD5302
Resolution
Relative Accuracy
Differential Nonlinearity
AD5312
Resolution
Relative Accuracy
Differential Nonlinearity
AD5322
Resolution
Relative Accuracy
Differential Nonlinearity
Offset Error
Gain Error
Lower Deadband
Offset Error Drift
5
Gain Error Drift
5
Power Supply Rejection Ratio
5
DC Crosstalk
5
8
±
0.15
±
0.02
Bits
LSB
LSB
±
1
±
0.25
Guaranteed Monotonic by Design Over All Codes
10
±
0.5
±
0.05
Bits
LSB
LSB
±
3
±
0.5
Guaranteed Monotonic by Design Over All Codes
12
±
2
±
0.2
±
0.4
±
0.15
10
–12
–5
–60
30
Bits
LSB
LSB
% of FSR
% of FSR
mV
ppm of FSR/
°
C
ppm of FSR/
°
C
dB
μ
V
±
12
±
1
±
3
±
1
60
Guaranteed Monotonic by Design Over All Codes
See Figures 2 and 3
See Figures 2 and 3
See Figures 2 and 3
V
DD
=
±
10%
DAC REFERENCE INPUTS
5
V
REF
Input Range
1
0
V
DD
V
DD
V
V
M
k
dB
dB
Buffered Reference Mode
Unbuffered Reference Mode
Buffered Reference Mode
Unbuffered Reference Mode, Input Impedance = R
DAC
Frequency = 10 kHz
Frequency = 10 kHz
V
REF
Input Impedance
>10
180
–90
–80
Reference Feedthrough
Channel-to-Channel Isolation
OUTPUT CHARACTERISTICS
5
Minimum Output Voltage
Maximum Output Voltage
6
DC Output Impedance
Short Circuit Current
0.001
V
DD
– 0.001
0.5
50
20
2.5
5
V min
V max
mA
mA
μ
s
μ
s
This is a measure of the minimum and maximum
drive capability of the output amplifier.
V
DD
= +5 V
V
= +3 V
Coming Out of Power-Down Mode. V
DD
= +5 V
Coming Out of Power-Down Mode. V
DD
= +3 V
Power-Up Time
LOGIC INPUTS
5
Input Current
V
IL
, Input Low Voltage
±
1
0.8
0.6
0.5
μ
A
V
V
V
V
V
V
pF
V
DD
= +5 V
±
10%
V
DD
= +3 V
±
10%
V
DD
= +2.5 V
V
DD
= +5 V
±
10%
V
DD
= +3 V
±
10%
V
DD
= +2.5 V
V
IH
, Input High Voltage
2.4
2.1
2.0
Pin Capacitance
2
3.5
POWER REQUIREMENTS
V
DD
I
DD
(Normal Mode)
V
DD
= +4.5 V to +5.5 V
V
DD
= +2.5 V to +3.6 V
2.5
5.5
V
I
Specification Is Valid for All DAC Codes
Both DACs Active and Excluding Load Currents
Both DACs in Unbuffered Mode. V
IH
= V
DD
and
V
IL
= GND. In Buffered Mode, extra current is
typically x
μ
A per DAC where x = 5
μ
A + V
REF
/R
DAC
.
300
230
450
350
μ
A
μ
A
I
DD
(Full Power-Down)
V
DD
= +4.5 V to +5.5 V
V
DD
= +2.5 V to +3.6 V
0.2
0.05
1
1
μ
A
μ
A
NOTES
1
See Terminology.
2
Temperature range: B Version: –40
°
C to +105
°
C.
3
DC specifications tested with the outputs unloaded.
4
Linearity is tested using a reduced code range: AD5302 (Code 8 to 248); AD5312 (Code 28 to 995); AD5322 (Code 115 to 3981).
5
Guaranteed by design and characterization, not production tested.
6
In order for the amplifier output to reach its minimum voltage, Offset Error must be negative. In order for the amplifier output to reach its maximum voltage,
V
REF
= V
DD
and “Offset plus Gain” Error must be positive.
Specifications subject to change without notice.
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