参数资料
型号: AD53032
厂商: Analog Devices, Inc.
英文描述: High Performance Driver/Comparator Active Load on a Single Chip
中文描述: 高性能驱动器/比较器单芯片有源负载
文件页数: 3/8页
文件大小: 101K
代理商: AD53032
–3–
REV. 0
AD53032
Parameter
Min
Typ
Max
Units
Test Conditions
Delay Change vs. Pulsewidth
Minimum Pulsewidth
3 V Swing
5 V Swing
Toggle Rate
<50
ps
V
L
= 0 V, V
H
= 2 V
2
3
250
ns
ns
MHz
V
L
= 0 V, V
H
= 3 V, 90% Reached, Measure @ 50%
V
L
= 0 V, V
H
= 5 V, 90% Reached, Measure @ 50%
V
L
= 0 V, V
H
= 5 V, VDUT > 3.0 V p-p
DYNAMIC PERFORMANCE, INHIBIT
Delay Time, Active to Inhibit
Delay Time, Inhibit to Active
1.5
1.5
4.0
3.5
±
1.0
2.2
ns
ns
ns
ns
Measured at 50%, V
H
= +2 V, V
L
= –2 V
Measured at 50%, V
H
= +2 V, V
L
= –2 V
Delay Time Matching (Z)
Z = Delay Time Active to Inhibit Test (Above)—
Delay Time Inhibit to Active Test (Above)
(Of Worst Two Edges)
V
H
= 0 V, V
L
= 0 V
V
H
= +2 V, V
L
= –2 V (Measured 20%/80% of 1 V Output)
V
H
= +2 V, V
L
= –2 V (Measured 20%/80% of 1 V Output)
I/O Spike
Rise, Fall Time, Active to Inhibit
Rise, Fall Time, Inhibit to Active
<200
mV, p-p
ns
ns
3.5
2.2
DYNAMIC PERFORMANCE , V
TERM
Delay Time, V
H
to V
TERM
Delay Time, V
L
to V
TERM
Delay Time, V
TERM
to V
H
and V
TERM
to V
L
Overshoot and Preshoot
3.0
5.0
4.0
+3.0 + 75
ns
ns
ns
% of Step + mV
Measured at 50%, V
L
= V
H
= +0.4 V, V
TERM
= –0.4 V
Measured at 50%, V
L
= V
H
= +0.4 V, V
TERM
= –0.4 V
Measured at 50%, V
L
= V
H
= +0.4 V, V
TERM
= –0.4 V
V
H
/V
L
, V
TERM
= (+0.4 V, –0.4 V), (0.0 V, –2.0 V),
(0.0 V, +7.0 V)
V
L
, V
H
= 0 V, V
TERM
= –2 V, 20%–80%
V
L
, V
H
= 0 V, V
TERM
= –2 V, 20%–80%
V
S
= V
S
±
3%
–3.0 + 75
V
TERM
Mode Rise Time
V
TERM
Mode Fall Time
PSRR, DRIVE or TERM Mode
4.0
5.5
ns
ns
dB
35
Specifications subject to change without notice.
COMPARATOR SPECIFICATIONS
(All specifications are at T
J
= +85
8
C
6
5
8
C, +V
S
= +12 V
6
3%, –V
S
= –7 V =
6
3% unless otherwise noted. All temperature coefficients are
measured at T
J
= +75
8
C to +95
8
C).
Parameter
Min
Typ
Max
Units
Test Conditions
DC INPUT CHARACTERISTICS
Offset Voltage (V
OS
)
Offset Voltage (Drift)
HCOMP, LCOMP Bias Current
Voltage Range (V
CM
)
Differential Voltage (V
DIFF
)
Gain and Linearity
–25
25
mV
μ
V/
°
C
μ
A
V
V
% FSR
CMV = 0 V
CMV = 0 V
V
IN
= 0 V
50
–50
–3
50
8.0
9.0
0.05
–0.05
V
IN
= –3 V to +8 V
LATCH ENABLE INPUTS
Logic “1” Current (I
IH
)
Logic “0” Current (I
IL
)
250
μ
A
μ
A
LE,
LE
= –0.8 V
LE,
LE
= –1.8 V
–250
DIGITAL OUTPUTS
Logic “1” Voltage (V
OH
)
Logic “0” Voltage (V
OL
)
Slew Rate
–0.98
V
V
V/ns
Q or
Q
, 50
to –2 V
Q or
Q
, 50
to –2 V
–1.5
1
SWITCHING PERFORMANCE
Propagation Delay
Input to Output
Latch Enable to Output
Propagation Delay Temperature Coefficient
Propagation Delay Change with Respect to
Slew Rate: 0.5 V, 1.0 V, 3.0 V/ns
Slew Rate: 5.0 V/ns
Amplitude: 1.0 V, 3.0 V, 5.0 V
Equivalent Input Rise Time
Pulsewidth Linearity
Settling Time
Latch Timing
Input Pulsewidth
Setup Time
Hold Time
0.9
2.5
ns
ns
ps/
°
C
V
IN
= 2 V p-p,
HCOMP = +1 V, LCOMP = +1 V
2
2
<
±
100
<
±
350
<
±
200
450
<
±
200
<25
ps
ps
ps
ps
ps
ns
V
IN
= 0 V to 5 V
V
IN
= 0 V to 5 V
V
IN
= 1.0 V/ns
V
IN
= 0 V to 3 V, 3 V/ns
V
IN
= 0 V to 3 V, 3 V/ns, PW = 3 ns–8 ns
Settling to
±
8 mV, V
IN
= 1 V to 0 V
<1.5
<1.0
<1.0
ns
ns
ns
Specifications subject to change without notice.
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