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| 型号： | AD534LD |
| 厂商： | Analog Devices Inc |
| 文件页数： | 5/21页 |
| 文件大小： | 0K |
| 描述： | IC PREC MULTIPLIER 14-CDIP |
| 标准包装： | 1 |
| 功能： | 模拟乘法器/除法器 |
| 位元/级数： | 四象限 |
| 封装/外壳： | 14-CDIP（0.300"，7.62mm） |
| 供应商设备封装： | 14-CDIP |
| 包装： | 管件 |
AD534
Data Sheet
Rev. D | Page 12 of 20
FUNCTIONAL DESCRIPTION
Figure 1 shows a functional block diagram of the AD534. Inputs
are converted to differential currents by three identical voltage-
to-current converters, each trimmed for zero offset. The product
of the X and Y currents is generated by a multiplier cell using
Gilbert’s translinear technique. An on-chip buried Zener
provides a highly stable reference, which is laser trimmed to
provide an overall scale factor of 10 V. The difference between
XY/SF and Z is then applied to the high gain output amplifier.
This permits various closed-loop configurations and dramati-
cally reduces nonlinearities due to the input amplifiers, a
dominant source of distortion in earlier designs.
The effectiveness of the new scheme can be judged from the
fact that, under typical conditions as a multiplier, the nonlinear-
ity on the Y input, with X at full scale (±10 V), is ±0.005% of FS.
Even at its worst point, which occurs when X = ±6.4 V, nonlinear-
ity is typically only ±0.05% of FS. Nonlinearity for signals applied
to the X input, on the other hand, is determined almost entirely
by the multiplier element and is parabolic in form. This error is a
major factor in determining the overall accuracy of the unit and
therefore is closely related to the device grade.
The generalized transfer function for the AD534 is given by
2
1
2
1
2
1
Z
SF
Y
X
A
V
OUT
where:
A is the open-loop gain of the output amplifier, typically
70 dB at dc.
X1, Y1, Z1, X2, Y2, and Z2 are the input voltages (full scale = ±SF,
peak = ±1.25 SF).
SF is the scale factor, pretrimmed to 10.00 V but adjustable by
the user down to 3 V.
In most cases, the open-loop gain can be regarded as infinite,
and SF is 10 V. The operation performed by the AD534, can
then be described in terms of the following equation:
(X1 X2)(Y1 Y2 ) = 10 V (Z1 Z2)
The user can adjust SF for values between 10.00 V and 3 V by
connecting an external resistor in series with a potentiometer
between SF and VS. The approximate value of the total
resistance for a given value of SF is given by the relationship:
SF
R
F
S
0
1
kΩ
4
.
5
Due to device tolerances, allowance should be made to vary RSF
by ±25% using the potentiometer. Considerable reduction in
bias currents, noise, and drift can be achieved by decreasing SF.
This has the overall effect of increasing signal gain without the
customary increase in noise. Note that the peak input signal is
always limited to 1.25 SF (that is, ±5 V for SF = 4 V) so the
overall transfer function shows a maximum gain of 1.25. The
performance with small input signals, however, is improved by
using a lower scale factor because the dynamic range of the
inputs is now fully utilized. Bandwidth is unaffected by the use
of this option.
Supply voltages of ±15 V are generally assumed. However,
satisfactory operation is possible down to ±8 V (see Figure 7).
Because all inputs maintain a constant peak input capability of
±1.25 SF, some feedback attenuation is necessary to achieve
output voltage swings in excess of ±12 V when using higher
supply voltages.
PROVIDES GAIN WITH LOW NOISE
The AD534 is the first general-purpose multiplier capable of
providing gains up to ×100, frequently eliminating the need for
separate instrumentation amplifiers to precondition the inputs.
The AD534 can be very effectively employed as a variable gain
differential input amplifier with high common-mode rejection.
The gain option is available in all modes and simplifies the
implementation of many function-fitting algorithms such as
those used to generate sine and tangent. The utility of this
feature is enhanced by the inherent low noise of the AD534:
90 μV rms (depending on the gain), a factor of 10 lower than
previous monolithic multipliers. Drift and feedthrough are also
substantially reduced over earlier designs.
OPERATION AS A MULTIPLIER
Figure 15 shows the basic connection for multiplication. Note
that the circuit meets all specifications without trimming.
09
67
5-
0
07
AD534
+VS
X1
X2
SF
Y1
Y2
OUT
Z1
Z2
–VS
+15V
–15V
X INPUT
±10V FS
±12V PK
Y INPUT
±10V FS
±12V PK
OPTIONAL SUMMING
INPUT, Z, ±10V PK
OUTPUT, ±12V PK =
(X1 – X2) (Y1 – Y2)
10V
+ Z2
Figure 15. Basic Multiplier Connection
To reduce ac feedthrough to a minimum (as in a suppressed
carrier modulator), apply an external trim voltage (±30 mV
shows the typical ac feedthrough with this adjustment mode.
Note that the Y input is a factor of 10 lower than the X input
and should be used in applications where null suppression is
critical.
sum an additional signal into the output. In this mode, the
output amplifier behaves as a voltage follower with a 1 MHz
small signal bandwidth and a 20 V/μs slew rate. This terminal
should always be referenced to the ground point of the driven
system, particularly if this is remote. Likewise, the differential
inputs should be referenced to their respective ground poten-
tials to realize the full accuracy of the AD534.
A much lower scaling voltage can be achieved without any
reduction of input signal range using a feedback attenuator as
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD534LD/+ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog Multiplier/Divider |
| AD534LDZ | 功能描述:IC PREC MULTIPLIER 14-CDIP RoHS:是 类别:集成电路 (IC) >> 线性 - 模拟乘法器，除法器 系列:- 标准包装:25 系列:HA 功能:模拟乘法器 位元/级数:四象限 封装/外壳:16-CDIP（0.300"，7.62mm） 供应商设备封装:16-CDIP 侧面铜焊 包装:管件 |
| AD534LH | 制造商:Analog Devices 功能描述:Analog Multiplier/Divider 4-Bit 10-Pin TO-100 Tube 制造商:Rochester Electronics LLC 功能描述:MULTIPLIER IC - Bulk 制造商:Analog Devices 功能描述:Analog Multiplier/Divider 4-Bit 10-Pin TO-100 Tube Tube 制造商:Analog Devices 功能描述:MULTIPLIER/DIVIDER |
| AD534LH/+ | 制造商:Analog Devices 功能描述: |
| AD534LHZ | 功能描述:IC MULTIPLIER TRIMMED TO-100-10 RoHS:是 类别:集成电路 (IC) >> 线性 - 模拟乘法器，除法器 系列:- 标准包装:25 系列:HA 功能:模拟乘法器 位元/级数:四象限 封装/外壳:16-CDIP（0.300"，7.62mm） 供应商设备封装:16-CDIP 侧面铜焊 包装:管件 |
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