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参数资料
| 型号： | AD536AJQ |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 模拟专用变换器 |
| 英文描述： | Integrated Circuit True RMS-to-DC Converter |
| 中文描述： | RMS TO DC CONVERTER, 0.09 MHz, CDIP14 |
| 封装： | CERDIP-14 |
| 文件页数： | 5/8页 |
| 文件大小： | 151K |
| 代理商： | AD536AJQ |
REV. B
AD536A
–
5
–
factors, (such as low duty cycle pulse trains), the averaging time
constant should be at least ten times the signal period. For
example, a 100 Hz pulse rate requires a 100 ms time constant,
which corresponds to a 4
μ
F capacitor (time constant = 25 ms
per
μ
F).
The primary disadvantage in using a large C
AV
to remove ripple
is that the settling time for a step change in input level is in-
creased proportionately. Figure 5 shows that the relationship
between C
AV
and 1% settling time is 115 milliseconds for each
microfarad of C
AV
. The settling time is twice as great for de-
creasing signals as for increasing signals (the values in Figure 5
are for decreasing signals). Settling time also increases for low
signal levels, as shown in Figure 6.
Figure 5. Error/Settling Time Graph for Use with the Stan-
dard rms Connection in Figure 1
Figure 6. Settling Time vs. Input Level
A better method for reducing output ripple is the use of a
“
post-filter.
”
Figure 7 shows a suggested circuit. If a single-pole
filter is used (C3 removed, R
X
shorted), and C2 is approximately
twice the value of C
AV
, the ripple is reduced as shown in Figure
8 and settling time is increased. For example, with C
AV
= 1
μ
F
and C2 = 2.2
μ
F, the ripple for a 60 Hz input is reduced from
10% of reading to approximately 0.3% of reading. The settling
time, however, is increased by approximately a factor of 3. The
values of C
AV
and C2
,
can, therefore, be reduced to permit faster
settling times while still providing substantial ripple reduction.
The two-pole post-filter uses an active filter stage to provide
even greater ripple reduction without substantially increasing
the settling times over a circuit with a one-pole filter. The values
of C
AV
, C2, and C3 can then be reduced to allow extremely fast
settling times for a constant amount of ripple. Caution should
be exercised in choosing the value of C
AV
, since the dc error is
dependent upon this value and is independent of the post filter.
For a more detailed explanation of these topics refer to the
RMS to DC Conversion Application Guide 2nd Edition,
available
from Analog Devices.
C2
C3
C3
Figure 7. 2-Pole
“
Post
”
Filter
Figure 8. Performance Features of Various Filter Types
AD536A PRINCIPLE OF OPERATION
The AD536A embodies an implicit solution of the rms equation
that overcomes the dynamic range as well as other limitations
inherent in a straightforward computation of rms. The actual
computation performed by the AD536A follows the equation:
V rms
=
Avg
.
V
IN
V rms
2
相关PDF资料 |
PDF描述 |
|---|---|
| AD536AKQ | Integrated Circuit True RMS-to-DC Converter |
| AD536ASD | Integrated Circuit True RMS-to-DC Converter |
| AD536ASE | Integrated Circuit True RMS-to-DC Converter |
| AD536ASH | Integrated Circuit True RMS-to-DC Converter |
| AD537 | Voltage-to-Frequency Converter IC(压频转换器芯片) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD536AKCD | 制造商:未知厂家 制造商全称:未知厂家 功能描述:RMS-to-DC Converter |
| AD536AKCQ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:RMS-to-DC Converter |
| AD536AKCWE | 制造商:未知厂家 制造商全称:未知厂家 功能描述:RMS-to-DC Converter |
| AD536AKD | 功能描述:IC TRUE RMS/DC CONV 14-CDIP RoHS:否 类别:集成电路 (IC) >> PMIC - RMS 至 DC 转换器 系列:- 标准包装:46 系列:- 电流 - 电源:1.2mA 电源电压:±18 V，36 V 安装类型:表面贴装 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC W 包装:管件 |
| AD536AKD/+ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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