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参数资料
| 型号： | AD5383BST-3-REEL |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | DAC |
| 英文描述： | 32-Channel, 3 V/5 V, Single-Supply, 12-Bit, Voltage Output DAC |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 6 us SETTLING TIME, 12-BIT DAC, PQFP100 |
| 封装： | 14 X 14 MM, MO-026BED, LQFP-100 |
| 文件页数： | 14/40页 |
| 文件大小： | 616K |
| 代理商： | AD5383BST-3-REEL |
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AD5382
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Rev. 0 | Page 14 of 40
RESET
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
REG0
REG1
VOUT23
VOUT22
VOUT21
VOUT20
AVDD3
AGND3
DAC_GND3
SIGNAL_GND3
VOUT19
VOUT18
VOUT17
VOUT16
AVDD2
AGND2
59
58
74
73
75
69
68
70
71
72
67
66
65
64
63
60
61
62
57
56
55
54
53
52
51
N
N
N
N
V
V
V
N
N
M
M
M
M
N
M
V
V
V
V
V
D
S
V
V
V
2
2
2
2
3
3
3
3
3
3
3
3
3
3
4
4
4
4
4
4
4
4
4
4
5
C
D
D
D
D
D
D
S
D
D
D
N
A
A
A
A
A
D
D
D
S
P
W
L
B
1
9
9
9
9
9
9
9
9
9
8
8
8
9
8
8
8
8
8
8
7
7
7
7
8
5
6
4
3
2
7
8
9
1
14
15
13
12
11
16
17
18
10
19
20
23
24
25
22
21
FIFO EN
CLR
VOUT24
VOUT25
VOUT26
VOUT27
SIGNAL_GND4
DAC_GND4
AGND4
AVDD4
VOUT28
VOUT29
VOUT30
VOUT31
REF GND
REFOUT/REFIN
SIGNAL_GND1
DAC_GND1
AVDD1
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
AGND1
PIN 1
AD5382
TOP VIEW
(Not to Scale)
0
Figure 8. 100-Lead LQFP Pin Configuration
Table 10. Pin Function Descriptions
Mnemonic
VOUTx
Function
Buffered Analog Outputs for Channel x. Each analog output is driven by a rail-to-rail output amplifier operating at a
gain of 2. Each output is capable of driving an output load of 5 k to ground. Typical output impedance is 0.5 .
Analog Ground Reference Points for Each Group of Eight Output Channels. All SIGNAL_GND pins are tied together
internally and should be connected to the AGND plane as close as possible to the AD5382.
Each group of eight channels contains a DAC_GND pin. This is the ground reference point for the internal 14-bit
DAC. These pins shound be connected to the AGND plane.
Analog Ground Reference Point. Each group of eight channels contains an AGND pin. All AGND pins should be
connected externally to the AGND plane.
Analog Supply Pins. Each group of eight channels has a separate AVDD pin. These pins are internally shorted and
should be decoupled with a 0.1 μF ceramic capacitor and a 10 μF tantalum capacitor. Operating range for the
AD5382-5 is 4.5 V to 5.5 V; operating range for the AD5382-3 is 2.7 V to 3.6 V.
Ground for All Digital Circuitry.
Logic Power Supply. Guaranteed operating range is 2.7 V to 5.5 V. It is recommended that these pins be decoupled
with 0.1 μF ceramic and 10 μF tantalum capacitors to DGND.
Ground Reference Point for the Internal Reference.
The AD5382 contains a common REFOUT/REFIN pin. When the internal reference is selected, this pin is the reference
output. If the application requires an external reference, it can be applied to this pin and the internal reference can
be disabled via the control register. The default for this pin is a reference input.
When the monitor function is enabled, this pin acts as the output of a 36-to-1 channel multiplexer that can be
programmed to multiplex one of channels 0 to 31 or any of the monitor input pins (MON_IN1 to MON_IN4) to the
MON_OUT pin. The MON_OUT pin’s output impedance is typically 500 and is intended to drive a high input
impedance like that exhibited by SAR ADC inputs.
SIGNAL_GND(1–4)
DAC_GND(1–4)
AGND(1–4)
AVDD(1–4)
DGND
DVDD
REFGND
REFOUT/REFIN
MON_OUT
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相关代理商/技术参数 |
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