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| 型号： | AD5398ABCBZ-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 5/17页 |
| 文件大小： | 0K |
| 描述： | IC DAC 10BIT CURRENT-SINK 9WLCSP |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 产品变化通告： | 8mm Carrier Tape Changes 28/Feb/2012 |
| 标准包装： | 10,000 |
| 设置时间： | 250µs |
| 位数： | 10 |
| 数据接口： | I²C，串行 |
| 转换器数目： | 1 |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 9-UFBGA，WLCSP |
| 供应商设备封装： | 9-WLCSP（1.52 x 1.69） |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 1 电流，单极 |
| 采样率（每秒）： | * |
AD5398A
Rev. 0 | Page 12 of 16
POWER SUPPLY BYPASSING AND GROUNDING
When accuracy is important in an application, it is beneficial
to consider power supply and ground return layout on the PCB.
The PCB for the AD5398A should have separate analog and
digital power supply sections. Where shared AGND and DGND
is necessary, the connection of grounds should be made at only
one point, as close as possible to the AD5398A.
Pay special attention to the layout of the AGND return path
and track it between the voice coil motor and ISINK to minimize
any series resistance. Figure 20 shows the output current sink
of the AD5398A and illustrates the importance of reducing the
effective series impedance of AGND, and the track resistance
between the motor and ISINK. The voice coil is modelled as
Inductor LC and Resistor RC. The current through the voice
coil is effectively a dc current that results in a voltage drop, VC,
when the AD5398A is sinking current; the effect of any series
inductance is minimal. The maximum voltage drop allowed
across RSENSE is 400 mV, and the minimum drain to source
voltage of Q1 is 200 mV. This means that the AD5398A output
has a compliance voltage of 600 mV. If VDROP falls below
600 mV, the output transistor, Q1, can no longer operate
properly and ISINK might not be maintained as a constant.
07
79
5-
0
19
AGND
VG
Q1
D1
GROUND
RESISTANCE
GROUND
INDUCTANCE
ISINK
RSENSE
3.3
RG
LG
VDROP
VT
VC
VBAT
RT
RC
VDD
LC
TRACE
RESISTANCE
VOICE
COIL
ACTUATOR
Figure 20. Effect of PCB Trace Resistance and Inductance
As the current increases through the voice coil, VC increases
and VDROP decreases and eventually approaches the minimum
specified compliance voltage of 600 mV. The ground return
path is modelled by the RG and LG components. The track resis-
tance between the voice coil and the AD5398A is modelled as
RT. The inductive effects of LG influence RSENSE and RC equally,
and because the current is maintained as a constant, it is not as
critical as the purely resistive component of the ground return path.
When the maximum sink current is flowing through the motor,
the resistive elements, RT and RG, may have an impact on the
voltage headroom of Q1 and may, in turn, limit the maximum
value of RC because of voltage compliance.
For example, if
VBAT = 3.6 V
RG = 0.5 Ω
RT = 0.5 Ω
ISINK = 120 mA
VDROP = 600 mV (the compliance voltage)
then the largest value of resistance of the voice coil, RC, is
=
×
+
×
+
=
SINK
G
SINK
T
SINK
DROP
BAT
C
I
R
I
R
I
V
R
)]
(
)
(
[
Ω
24
mA
120
Ω)]
0.5
mA
(120
2
mV
[600
V
3.6
=
×
+
For this reason, it is important to minimize any series impedance
on both the ground return path and interconnect between the
AD5398A and the motor.
The power supply of the AD5398A should be decoupled with
0.1 μF and 10 μF capacitors. These capacitors should be kept as
physically close as possible, with the 0.1 μF capacitor serving as
a local bypass capacitor, and therefore should be located as close
as possible to the VDD pin. The 10 μF capacitor should be a
tantalum bead-type; the 0.1 μF capacitor should be a ceramic
type with a low effective series resistance and effective series
inductance. The 0.1 μF capacitor provides a low impedance path
to ground for high transient currents.
The power supply line should have as large a trace as possible to
provide a low impedance path and reduce glitch effects on the
supply line. Clocks and other fast switching digital signals
should be shielded from other parts of the board by digital
ground. Avoid crossover of digital and analog signals if possible.
When traces cross on opposite sides of the board, ensure that
they run at right angles to each other to reduce feedthrough
effects through the board. The best board layout technique is to
use a multilayer board with ground and power planes, where
the component side of the board is dedicated to the ground
plane only and the signal traces are placed on the solder side.
However, this is not always possible with a 2-layer board.
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