参数资料
型号: AD5552BRZ
厂商: Analog Devices Inc
文件页数: 2/16页
文件大小: 0K
描述: IC DAC 14BIT SERIAL IN 14SOIC
产品培训模块: Data Converter Fundamentals
DAC Architectures
标准包装: 56
设置时间: 1µs
位数: 14
数据接口: 串行
转换器数目: 1
电压电源: 单电源
功率耗散(最大): 6.05mW
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 14-SOIC(0.154",3.90mm 宽)
供应商设备封装: 14-SOICN
包装: 管件
输出数目和类型: 1 电压,单极;1 电压,双极
采样率(每秒): 1M
AD5551/AD5552
Rev. A | Page 10 of 16
TERMINOLOGY
Relative Accuracy
For the DAC, relative accuracy or integral nonlinearity (INL) is
a measure of the maximum deviation, in LSBs, from a straight
line passing through the endpoints of the DAC transfer function.
A typical INL vs. code plot can be seen in Figure 6.
Differential Nonlinearity
Differential nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of ±1 LSB maximum
ensures monotonicity. A typical DNL vs. code plot can be seen
Gain Error
Gain error is the difference between the actual and ideal analog
output range, expressed as a percent of the full-scale range. It
is the deviation in slope of the DAC transfer characteristic
from ideal.
Gain Error Temperature Coefficient
This is a measure of the change in gain error with changes in
temperature. It is expressed in ppm/°C.
Zero-Code Error
Zero code error is a measure of the output error when zero code
is loaded to the DAC register.
Zero-Code Temperature Coefficient
This is a measure of the change in zero code error with a change
in temperature. It is expressed in mV/°C.
Digital-to-Analog Glitch Impulse
Digital-to-analog glitch impulse is the impulse injected into the
analog output when the input code in the DAC register changes
state. It is normally specified as the area of the glitch in nV-sec
and is measured when the digital input code is changed by
1 LSB at the major carry transition. A plot of the glitch impulse
is shown in Figure 19.
Digital Feedthrough
Digital feedthrough is a measure of the impulse injected into the
analog output of the DAC from the digital inputs of the DAC,
but is measured when the DAC output is not updated. CS is
held high, while the CLK and DIN signals are toggled. It is
specified in nV-sec and is measured with a full-scale code change
on the data bus, that is, from all 0s to all 1s and vice versa. A
typical plot of digital feedthrough is shown in
.
Power Supply Rejection Ratio
This specification indicates how the output of the DAC is
affected by changes in the power supply voltage. Power-supply
rejection ratio is quoted in terms of % change in output per %
change in VDD for full-scale output of the DAC. VDD is varied
by ±10%.
Reference Feedthrough
This is a measure of the feedthrough from the VREF input to the
DAC output when the DAC is loaded with all 0s. A 100 kHz,
1 V p-p is applied to VREF. Reference feedthrough is expressed
in mV p-p.
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