参数资料
| 型号： | AD5663BRMZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 9/24页 |
| 文件大小： | 0K |
| 描述： | IC DAC 16BIT DUAL 10-MSOP |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 标准包装： | 1 |
| 系列： | nanoDAC™ |
| 设置时间： | 4µs |
| 位数： | 16 |
| 数据接口： | 串行 |
| 转换器数目： | 2 |
| 电压电源： | 单电源 |
| 功率耗散（最大）： | 2.5mW |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 10-MSOP |
| 包装： | 标准包装 |
| 输出数目和类型： | 2 电压，单极；2 电压，双极 |
| 采样率（每秒）： | 220k |
| 其它名称： | AD5663BRMZ-REEL7DKR |
AD5663
Rev. 0 | Page 17 of 24
Synchronous LDAC:
The DAC registers are updated after new
data is read in on the falling edge of the 24th SCLK pulse.
LDAC can be permanently low or pulsed, as shown in Figure 2.
Asynchronous LDAC:
The outputs are not updated at the same
time that the input registers are written to. When LDAC goes
low, the DAC registers are updated with the contents of the
input register.
The LDAC register gives the user full flexibility and control
over the hardware LDAC pin. This register allows the user to
select which combination of channels to simultaneously update
when the hardware LDAC pin is executed. Setting the LDAC bit
register to 0 for a DAC channel means that the update of this
channel is controlled by the LDAC pin. If this bit is set to 1, this
channel synchronously updates; that is, the DAC register is
updated after new data is read in, regardless of the state of the
LDAC pin. It effectively sees the LDAC pin as being pulled low.
See Table 13 for the LDAC register mode of operation.
This flexibility is useful in applications where the user wants to
simultaneously update select channels while the rest of the
channels are synchronously updating
Writing to the DAC using Command 110 loads the 2-bit LDAC
register [DB1:DB0]. The default for each channel is 0; that is,
the LDAC pin works normally. Setting the bits to 1 means the
DAC register is updated regardless of the state of the LDAC pin.
See Table 14 for contents of the input shift register during the
LDAC register setup command.
Table 13. LDAC Register Mode of Operation
LDAC Bits
(DB1 to DB0)
LDAC Pin
LDAC Operation
0
1/0
Determined by LDAC pin
1
x = don’t care
The DAC registers are updated
after new data is read in on the
falling edge of the 24th SCLK
pulse
Table 14. 24-Bit Input Shift Register Contents for LDAC Register Setup Command
MSB
LSB
DB23 to DB22
DB21
DB20
DB19
DB18
DB17
DB16
DB15 to DB2
DB1
DB0
x
1
0
x
DAC B
DAC A
Don’t care
Command bits (C2 to C0)
Address bits (A3 to A0);
Don’t care
Set DAC to 0 or 1 for required mode of
operation
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相关代理商/技术参数 |
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| AD5663R | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual 12-/14-/16-Bit nanoDAC with 5 ppm/C On-Chip Reference |
| AD5663RBCPZ-3R2 | 功能描述:IC DAC NANO 16BIT DUAL 10-LFCSP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:nanoDAC™ 标准包装:47 系列:- 设置时间:2µs 位数:14 数据接口:并联 转换器数目:1 电压电源:单电源 功率耗散（最大）:55µW 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:管件 输出数目和类型:1 电流，单极；1 电流，双极 采样率（每秒）:* |
| AD5663RBCPZ-3REEL7 | 功能描述:IC DAC NANO 16BIT 1.25V 10-LFCSP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:nanoDAC™ 产品培训模块:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色产品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 标准包装:91 系列:- 设置时间:4µs 位数:10 数据接口:MICROWIRE?，串行，SPI? 转换器数目:8 电压电源:单电源 功率耗散（最大）:2.7mW 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:14-WFDFN 裸露焊盘 供应商设备封装:14-DFN-EP（4x3） 包装:管件 输出数目和类型:8 电压，单极 采样率（每秒）:* |
| AD5663RBCPZ-5REEL7 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual 12-/14-/16-Bit nanoDAC with 5 ppm/C On-Chip Reference |
| AD5663RBRMZ-3 | 功能描述:IC DAC NANO 16BIT 1.25V 10-MSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:nanoDAC™ 标准包装:1 系列:- 设置时间:4.5µs 位数:12 数据接口:串行，SPI? 转换器数目:1 电压电源:单电源 功率耗散（最大）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOICN 包装:剪切带 (CT) 输出数目和类型:1 电压，单极；1 电压，双极 采样率（每秒）:* 其它名称:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
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