参数资料
型号: AD637JR-REEL
厂商: Analog Devices Inc
文件页数: 15/21页
文件大小: 0K
描述: IC RMS/DC CONV PRECISION 16-SOIC
产品变化通告: Product Discontinuance 27/Oct/2011
标准包装: 1,000
电流 - 电源: 2.2mA
电源电压: ±3 V ~ 18 V
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
供应商设备封装: 16-SOIC W
包装: 带卷 (TR)
配用: AD637-EVALZ-ND - BOARD EVALUATION FOR AD637
AD637
1μF
V+
3.3M ?
3.3M ?
3
7
1 BUFF IN
BUFFER
AD637
BUFF
OUT 14
1μF
2
AD548JN
4
6
FILTERED
V RMS OUTPUT
2 NC
ABSOLUTE
VALUE
V IN 13
SIGNAL
INPUT
V–
6.8M ?
+V S
OUTPUT
OFFSET 50k ?
ADJUST
–V S
1M ?
3 COMMON
OUTPUT
4 OFFSET
+V S 5 CS
4.7k ?
BIAS
SECTION
SQUARER/DIVIDER
25k ?
NC 12
11
+V S
10
–V S
+V S
–V S
1000pF
25k ?
9
V OUT
V IN2
6 DEN
INPUT
7
dB OUTPUT
FILTER
C AV 8
+
100μF
V RMS
499k ? 1%
C AV1
3.3μF
R
NOTES
1. VALUES CHOSEN TO GIVE 0.1% AVERAGING ERROR @ 1Hz.
2. NC = NO CONNECT.
Figure 21. AD637 as a Low Frequency RMS Converter
V X + V Y 2
V X + V Y 2
LOW FREQUENCY MEASUREMENTS
If the frequencies of the signals to be measured are below 10 Hz,
the value of the averaging capacitor required to deliver even 1%
averaging error in the standard rms connection becomes
extremely large. Figure 21 shows an alternative method of
obtaining low frequency rms measurements. The averaging
time constant is determined by the product of R and C AV1 , in
this circuit, 0.5 sec/μF of C AV . This circuit permits a 20:1
reduction in the value of the averaging capacitor, permitting the
use of high quality tantalum capacitors. It is suggested that the
2-pole, Sallen-Key filter shown in Figure 21 be used to obtain a
low ripple level and minimize the value of the averaging
capacitor.
If the frequency of interest is below 1 Hz, or if the value of the
averaging capacitor is still too large, the 20:1 ratio can be
increased. This is accomplished by increasing the value of R.
If this is done, it is suggested that a low input current, low offset
voltage amplifier, such as the AD548, be used instead of the
internal buffer amplifier. This is necessary to minimize the
offset error introduced by the combination of amplifier input
VECTOR SUMMATION
Vector summation can be accomplished through the use of two
AD637s, as shown in Figure 22. Here, the averaging capacitors
are omitted (nominal 100 pF capacitors are used to ensure
stability of the filter amplifier), and the outputs are summed as
shown. The output of the circuit is
V OUT = V X 2 + V Y 2
This concept can be expanded to include additional terms by
feeding the signal from Pin 9 of each additional AD637 through
a 10 kΩ resistor to the summing junction of the AD711 and
tying all of the denominator inputs (Pin 6) together.
If C AV is added to IC1 in this configuration, then the output is
2
If the averaging capacitor is included on both IC1 and IC2, the
output is
2
currents and the larger resistance.
This circuit has a dynamic range of 10 V to 10 mV and is
limited only by the 0.5 mV offset voltage of the AD637.
The useful bandwidth is 100 kHz.
Rev. K | Page 14 of 20
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