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参数资料
型号： AD6635BB
厂商： ANALOG DEVICES INC
元件分类： 无绳电话/电话
英文描述： 4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP)
中文描述： TELECOM, CELLULAR, BASEBAND CIRCUIT, PBGA324
封装： 19 X 19 MM, PLASTIC, BGA-324
文件页数： 1/60页
文件大小： 799K
代理商： AD6635BB
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
AD6635
4-Channel, 80 MSPS WCDMA
Receive Signal Processor (RSP)
FUNCTIONAL BLOCK DIAGRAM
INA[13:0]
EXPA[2:0]
IENA
LIA-A
LIA-B
INB[13:0]
EXPB[2:0]
LIB-A
LIB-B
IENB
INC[13:0]
EXPC[2:0]
IENC
LIB-A
LIB-B
IND[13:0]
EXPD[2:0]
LID-A
LID-B
IEND
SYNCA
SYNCB
SYNCC
SYNCD
EXTERNAL
SYNC.
CIRCUIT
I
N
P
U
T
M
A
T
R
I
X
I
N
P
U
T
M
A
T
R
I
X
NCO
NCO
NCO
NCO
NCO
NCO
NCO
NCO
rCIC2
RESAMPLER
CIC5
rCIC2
RESAMPLER
CIC5
rCIC2
RESAMPLER
CIC5
rCIC2
RESAMPLER
CIC5
rCIC2
RESAMPLER
CIC5
rCIC2
RESAMPLER
CIC5
rCIC2
RESAMPLER
CIC5
rCIC2
RESAMPLER
CIC5
CLK
RSP
CLK
RAM
CHANNEL 0
RAM
COEFFICIENT
CHANNEL 1
RAM
CHANNEL 2
RAM
FILTER
CHANNEL 3
RAM
CHANNEL 4
RAM
CHANNEL 5
RAM
CHANNEL 6
RAM
CHANNEL 7
BUILT-IN (BIST)
SELF-TEST CIRCUITRY
TO A AND B
OUTPUT
PORTS
TO A AND B
OUTPUT
PORTS
TO A AND B
OUTPUT
PORTS
TO A AND B
OUTPUT
PORTS
CH B INTERPOLATING
HALF-BAND FILTER,
INTERLEAVING & AGC
CH A INTERPOLATING
HALF-BAND FILTER,
INTERLEAVING & AGC
CH C INTERPOLATING
HALF-BAND FILTER,
INTERLEAVING & AGC
CH D INTERPOLATING
HALF-BAND FILTER,
TO C AND D
OUTPUT
PORTS
TO C AND D
PORTS
TO C AND D
OUTPUT
TO C AND D
OUTPUT
PORTS
MICROPORT OR SERIAL
PORT CONTROL
RCF OUTPUTS
CHANNELS 0,
1,
2,
3
RCF OUTPUTS
1,
2,
3
RCF OUTPUTS
CHANNELS 4,
5,
6,
7
RCF OUTPUTS
CHANNELS 4,
5,
6,
7
PORT A
LINK PORT
OR
PARALLEL
PORT
CH A AND B
OUTPUT MUX
CIRCUITRY
PORT B
LINK PORT
OR
PARALLEL
PORT
PORT C
8-BIT DSP
LINK PORT
OR
16-BIT
PARALLEL
OUTPUT
PORT D
8-BIT DSP
LINK PORT
OR
16-BIT
PARALLEL
CH C AND D
OUTPUT MUX
CIRCUITRY
FEATURES
Four 80 MSPS Wideband Inputs (14 Linear Bits Plus 3 RSSI)
4 Real Input Ports/2 Complex Input Ports
Processes 4 Wideband Channels (UMTS or cdma2000
1x) or 8 GSM/EDGE, IS136 Channels
8 Independent Digital Receivers in a Single Package
Four 16-Bit Parallel Output Ports and Four 8-Bit Link Ports
4 Programmable Digital AGC Loops with 96 dB Range
Digital Resampling for Noninteger Decimation Rates
Programmable Decimating FIR Filters
4 Interpolating Half-Band Filters
Flexible Control for Multicarrier and Phased Array
Programmable Attenuator Control for Clip Prevention and
External Gain Ranging via Level Indicator
3.3 V I/O, 2.5 V CMOS Core
User Configurable Built-in Self Test (BIST) Capability
APPLICATIONS
Multicarrier, Multimode Digital Receivers
GSM, IS136, EDGE, PHS, IS95, UMTS, cdma2000
Micro and Pico Cell Systems, Software Radios
Wireless Local Loop
Smart Antenna Systems
In-Building Wireless Telephony
相关PDF资料
PDF描述
AD6636 150 MSPS Wideband Digital Down-Converter (DDC)
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相关代理商/技术参数
参数描述
AD6635BB/PCB 制造商:Analog Devices 功能描述:Evaluation Kit For 4-Channel, 80MSPS WCDMA Receive Signal Processor
AD6635BBZ 制造商:Analog Devices 功能描述:Receive Signal Processor 324-Pin BGA
AD6636 制造商:AD 制造商全称:Analog Devices 功能描述:150 MSPS Wideband Digital Down-Converter (DDC)
AD6636BBC 制造商:Analog Devices 功能描述:Digital Down Converter 256-Pin CSP-BGA
AD6636BBCZ 功能描述:IC DIGITAL DWNCONV 6CH 256CSPBGA RoHS:是 类别:RF/IF 和 RFID >> RF 混频器 系列:AD6636 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:100 系列:- RF 型:W-CDMA 频率:2.11GHz ~ 2.17GHz 混频器数目:1 增益:17dB 噪音数据:2.2dB 次要属性:- 电流 - 电源:11.7mA 电源电压:2.7 V ~ 3.3 V 包装:托盘 封装/外壳:12-VFQFN 裸露焊盘 供应商设备封装:12-QFN-EP（3x3）
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