参数资料
型号: AD6645ASVZ-105
厂商: Analog Devices Inc
文件页数: 8/24页
文件大小: 0K
描述: IC ADC 14BIT 105MSPS 52TQFP
设计资源: Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109)
标准包装: 1
位数: 14
采样率(每秒): 105M
数据接口: 并联
转换器数目: 4
功率耗散(最大): 1.75W
电压电源: 模拟和数字
工作温度: -10°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 52-TQFP 裸露焊盘
供应商设备封装: 52-TQFP-EP(10x10)
包装: 托盘
输入数目和类型: 1 个差分,双极
AD6645
Rev. D | Page 16 of 24
Spurious-Free Dynamic Range (SFDR)
The ratio of the rms signal amplitude to the rms value of the
peak spurious spectral component. The peak spurious component
may or may not be a harmonic. May be reported in dBc (that is,
degrades as signal level is lowered) or dBFS (always related back
to converter full scale).
Two-Tone Intermodulation Distortion Rejection
The ratio of the rms value of either input tone to the rms value
of the worst third-order intermodulation product, reported in dBc.
Two-Tone SFDR
The ratio of the rms value of either input tone to the rms value
of the peak spurious component. The peak spurious component
may or may not be an IMD product, and may be reported in
dBc (that is, degrades as signal level is lowered) or in dBFS
(always related back to converter full scale).
Worst Other Spur
The ratio of the rms signal amplitude to the rms value of the
worst spurious component (excluding the second and third
harmonics), reported in dBc.
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