参数资料
型号: AD667JN
厂商: Analog Devices Inc
文件页数: 8/8页
文件大小: 0K
描述: IC DAC 12BIT V-OUT 28-DIP
产品培训模块: Data Converter Fundamentals
DAC Architectures
产品变化通告: Product Discontinuance 27/Oct/2011
标准包装: 13
设置时间: 3µs
位数: 12
转换器数目: 1
电压电源: 双 ±
功率耗散(最大): 1W
工作温度: 0°C ~ 70°C
安装类型: 通孔
封装/外壳: 28-DIP(0.600",15.24mm)
供应商设备封装: 28-PDIP
包装: 管件
输出数目和类型: 1 电压,单极;1 电压,双极
采样率(每秒): 500k
AD667
REV. A
–8–
C842b–22–8/87
PRINTED
IN
U.S.A.
Right-justified data can be similarly accommodated. The over-
lapping of data lines is reversed, and the address connections
are slightly different. The AD667 still occupies two adjacent
locations in the processor’s memory map. In the circuit of Fig-
ure 9, location X01 loads the 8 LSBs and location X10 loads
the 4 MSBs and updates the output.
Figure 9. Right-Justified 8-Bit Bus Interface
USING THE AD667 WITH 12- AND 16-BIT BUSES
The AD667 is easily interfaced to 12- and 16-bit data buses. In
this operation, all four address lines (A0 through A3) are tied
low, and the latch is enabled by CS going low. The AD667 thus
occupies a single memory location.
This configuration uses the first and second rank registers
simultaneously. The CS input can be driven from an active-low
decoded address. It should be noted that any data bus activity
during the period when CS is low will cause activity at the
AD667 output. If data is not guaranteed stable during this
period, the second rank register can be used to provide double
buffering.
Figure 10. Connections for 12- and 16-Bit Bus Interface
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
28-Contact LCC (E)
28-Terminal Plastic Leaded
Chip Carrier (P)
28-Pin Ceramic DIP (D)
28-Pin Plastic DIP (N)
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