参数资料
型号: AD711JR-REEL
厂商: Analog Devices Inc
文件页数: 2/16页
文件大小: 0K
描述: IC OPAMP BIFET PREC 25MA 8SOIC
标准包装: 2,500
放大器类型: J-FET
电路数: 1
转换速率: 20 V/µs
-3db带宽: 4MHz
电流 - 输入偏压: 15pA
电压 - 输入偏移: 300µV
电流 - 电源: 2.5mA
电流 - 输出 / 通道: 25mA
电压 - 电源,单路/双路(±): 9 V ~ 36 V,±4.5 V ~ 18 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 带卷 (TR)
REV. E
AD711
–10–
AD711K
CF
VOUT
0.1 F
–15
+15
C1
33pF
R2*
OUT1
RFB
VDD
VREF
DGND AGND
R1*
VIN
ANALOG
COMMON
GAIN
ADJUST
DB11-DB0
VDD
AD7545
*FOR VALUES R1 AND R2,
REFER TO TABLE 1
Figure 8. Unipolar Binary Operation
R1 and R2 calibrate the zero offset and gain error of the DAC.
Specific values for these resistors depend upon the grade of
AD7545 and are shown below.
Table I. Recommended Trim Resistor Values vs. Grades
of the AD7545 for VDD = 5 V
TRIM
RESISTOR JN/AQ/SD KN/BQ/TD LN/CQ/UD GLN/GCQ/GUD
R1
500
W
200
W
100
W
20
W
R2
150
W
68
W
33
W
6.8
W
NOISE CHARACTERISTICS
The random nature of noise, particularly in the 1/f region, makes
it difficult to specify in practical terms. At the same time,
designers of precision instrumentation require certain guaranteed
maximum noise levels to realize the full accuracy of their equipment.
The AD711C grade is specified at a maximum level of 4.0
mV p-p,
in a 0.1 Hz to 10 Hz bandwidth. Each AD711C receives a 100%
noise test for two 10-second intervals; devices with any excursion
in excess of 4.0
mV are rejected. The screened lot is then submitted
to Quality Control for verification on an AQL basis.
All other grades of the AD711 are sample-tested on an AQL
basis to a limit of 6
mV p-p, 0.1 to 10 Hz.
DRIVING THE ANALOG INPUT OF AN A/D CONVERTER
An op amp driving the analog input of an A/D converter, such
as that shown in Figure 11, must be capable of maintaining a
constant output voltage under dynamically changing load conditions.
In successive-approximation converters, the input current is
compared to a series of switched trial currents. The comparison
point is diode clamped but may deviate several hundred millivolts
resulting in high frequency modulation of A/D input current.
Figures 10a and 10b show the settling time characteristics of the
AD711 when used as a DAC output buffer for the AD7545.
a. Full-Scale Positive
b. Full-Scale Negative
Transition
Figure 10. Settling Characteristics for AD711 with AD7545
compared to a series of switched trial currents. The comparison
point is diode clamped but may deviate several hundred milli-
volts resulting in high frequency modulation of A/D input
current. The output impedance of a feedback amplifier is made
artificially low by the loop gain. At high frequencies, where the
loop gain is low, the amplifier output impedance can approach
its open loop value. Most IC amplifiers exhibit a minimum open
loop output impedance of 25
W due to current limiting resistors.
A few hundred microamps reflected from the change in con-
verter loading can introduce errors in instantaneous input
Figures 8 and 9 show the AD711 and AD7545 (12-bit CMOS
DAC) configured for unipolar binary (2-quadrant multiplication)
or bipolar (4-quadrant multiplication) operation. Capacitor C1
provides phase compensation to reduce overshoot and ringing.
+15V
0.1 F
AD711K
–15V
R3
10k
1%
+15V
0.1 F
AD711K
–15V
R5
20k
1%
R4
20k
1%
R2*
C1
33pF
OUT1
RFB
VDD
VREF
DGND
AGND
R1*
VIN
GAIN
ADJUST
DB11-DB0
VDD
VOUT
AD7545
12
DATA INPUT
ANALOG
COMMON
*FOR VALUES R1 AND R2,
REFER TO TABLE 1
Figure 9. Bipolar Operation
+15V
0.1 F
AD711
–15V
R2
100
GAIN
ADJUST
12/8
R1
100
OFFSET
ADJUST
CS
AO
R/C
CE
REF IN
REF OUT
BIP OFF
10VIN
20VIN
ANA COM
STS
HIGH
BITS
MIDDLE
BITS
LOW
BITS
+5V
+15V
–15V
DIG COM
AD574
10V
ANALOG
INPUT
ANALOG COM
Figure 11. AD711 as ADC Unity Gain Buffer
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