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参数资料
| 型号： | AD7243AR |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | DAC |
| 英文描述： | LC2MOS 12-Bit Serial DACPORT |
| 中文描述： | SERIAL INPUT LOADING, 5 us SETTLING TIME, 12-BIT DAC, PDSO16 |
| 封装： | SOIC-16 |
| 文件页数： | 9/12页 |
| 文件大小： | 171K |
| 代理商： | AD7243AR |
REV. A
–9–
AD7243
MICROPROCESSOR INTERFACING
Microprocessor interfacing to the AD7243 is via a serial bus
which uses standard protocol compatible with DSP processors
and microcontrollers. The communications channel requires a
three-wire interface consisting of a clock signal, a data signal
and a synchronization signal. The AD7243 requires a 16-bit
data word with data valid on the falling edge of SCLK. For all
the interfaces, the DAC update may be done automatically
when all the data is clocked in or it may be done under control
of
LDAC
.
Figures 11 to 16 show the AD7243 configured for interfacing to
a number of popular DSP processors and microcontrollers.
AD7243–ADSP-2101/ADSP-2102 Interface
Figure 11 shows a serial interface between the AD7243 and the
ADSP-2101/ADSP-2102 DSP processor. The ADSP-2101/
ADSP-2102 contains two serial ports, and either port may be
used in the interface. The data transfer is initiated by
TFS
going
low. Data from the ADSP-2101/ADSP-2102 is clocked into the
AD7243 on the falling edge of SCLK. When the data transfer is
complete,
TFS
is taken high. In the interface shown the DAC is
updated using an external timer which generates an
LDAC
pulse. This could also be done using a control or decoded ad-
dress line from the processor. Alternatively, the
LDAC
input
could be hard wired low and in this case the update takes place
automatically on the sixteenth falling edge of SCLK.
ADSP - 2101/
ADSP - 2102*
TIMER
TFS
SCLK
DT
LDAC
SYNC
SCLK
SDIN
AD7243*
*ADDITIONAL PINS OMITTED FOR CLARITY
Figure 11. AD7243–ADSP-2101/ADSP-2102 Interface
AD7243–DSP56000 Interface
A serial interface between the AD7243 and the DSP56000 is
shown in Figure 12. The DSP56000 is configured for Normal
Mode Asynchronous operation with Gated Clock. It is also set
up for a 16-bit word with SCK and SC2 as outputs and the FSL
control bit set to a “0.” SCK is internally generated on the
DSP56000 and applied to the AD7243 SCLK input. Data from
the DSP56000 is valid on the falling edge of SCK. The SC2
output provides the framing pulse for valid data. This line must
be inverted before being applied to the
SYNC
input of the
AD7243.
The
LDAC
input of the AD7243 is connected to DGND so the
update of the DAC latch takes place automatically on the six-
teenth falling edge of SCLK. An external timer could also be
used as in the previous interface if an external update is
required.
DSP56000
SCK
STD
SC2
LDAC
SCLK
SDIN
AD7243*
SYNC
*ADDITIONAL PINS OMITTED FOR CLARITY
Figure 12. AD7243–DSP56000 Interface
AD7243–TMS32020 Interface
Figure 13 shows a serial interface between the AD7243 and the
TMS32020 DSP processor. In this interface, the CLKX and
FSX signals for the TMS32020 should be generated using ex-
ternal clock/timer circuitry. The FSX pin of the TMS32020
must be configured as an input. Data from the TMS32020 is
valid on the falling edge of CLKX.
The clock/timer circuitry generates the
LDAC
signal for the
AD7243 to synchronize the update of the output with the serial
transmission. Alternatively, the automatic update mode may be
selected by connecting
LDAC
to DGND.
LDAC
SYNC
SCLK
SDIN
AD7243*
*ADDITIONAL PINS OMITTED FOR CLARITY
CLOCK/
TIMER
TMS32020
FSX
CLKX
DX
Figure 13. AD7243–TMS32020 Interface
相关PDF资料 |
PDF描述 |
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| AD7243BN | 47 UF, 20V CAP., TANTALUM |
| AD7243BQ | LC2MOS 12-Bit Serial DACPORT |
| AD7243BR | SM IC/74HC08 SO-14 QUAD 2-IN |
| AD7243SQ2 | LC2MOS 12-Bit Serial DACPORT |
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| AD7243ARZ | 功能描述:IC DAC 12BIT W/AMP W/REF 16-SOIC RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:DACPORT® 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 设置时间:4µs 位数:12 数据接口:串行 转换器数目:2 电压电源:单电源 功率耗散（最大）:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 供应商设备封装:8-uMAX 包装:管件 输出数目和类型:2 电压，单极 采样率（每秒）:* 产品目录页面:1398 (CN2011-ZH PDF) |
| AD7243ARZ | 制造商:Analog Devices 功能描述:IC, DAC, 12BIT, 300KSPS, SOIC-16 |
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