参数资料
型号: AD7248AAQ
厂商: ANALOG DEVICES INC
元件分类: DAC
英文描述: LC2MOS 12-Bit DACPORTs
中文描述: PARALLEL, 8 BITS INPUT LOADING, 7 us SETTLING TIME, 12-BIT DAC, CDIP20
封装: 0.300 INCH, CERDIP-20
文件页数: 14/16页
文件大小: 306K
代理商: AD7248AAQ
AD7245A/AD7248A
REV. A
–14–
Figure 16. AD7248A to 68008 Interface
An interface circuit for connections to the 6502 or 6809 micro-
processors is shown in Figure 17. Once again, the AD7248A is
memory mapped and data is right justified. T he procedure for
writing data to the AD7248A is as outlined for the 8085A/8088.
For the 6502 microprocessor the
φ
2 clock is used to generate
the
WR
, while for the 6809 the E signal is used.
Figure 17. AD7248A to 6502/6809 Interface
Figure 18 shows a connection diagram between the AD7248A
and the 8051 microprocessor. T he AD7248A is port mapped in
this interface and is configured in the automatic transfer mode.
Data to be loaded to the input latch low byte is output to Port 1.
Output Line P3.0, which is connected to
CSLSB
of the
AD7248A, is pulsed to load data into the low byte of the input
latch. Pulsing the P3.1 line, after the high byte data has been set
up on Port 1, updates the output of the AD7248A. T he
WR
in-
put of the AD7248A can be hardwired low in this application
because spurious address strobes on
CSLSB
and
CSMSB
do not
occur.
Figure 18. AD7248A to MCS-51 Interface
相关PDF资料
PDF描述
AD7248AAR LC2MOS 12-Bit DACPORTs
AD7248ABN LC2MOS 12-Bit DACPORTs
AD7248ABR LC2MOS 12-Bit DACPORTs
AD7248ATQ LC2MOS 12-Bit DACPORTs
AD7248JN CAP CERM 15000PF 50V X7R 10%0805
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