参数资料
型号: AD7248ABN
厂商: ANALOG DEVICES INC
元件分类: DAC
英文描述: LC2MOS 12-Bit DACPORTs
中文描述: PARALLEL, 8 BITS INPUT LOADING, 7 us SETTLING TIME, 12-BIT DAC, PDIP20
封装: 0.300 INCH, PLASTIC, DIP-20
文件页数: 12/16页
文件大小: 306K
代理商: AD7248ABN
AD7245A/AD7248A
REV. A
–12–
T he circuit of Figure 10 can be modified to provide a program-
mable current source to AGND or –V
SINK
(for –V
SINK
, dual sup-
plies are required on the AD7245A/AD7248A). T he AD7245A/
AD7248A is configured as before. T he current through R1 is
mirrored with a current mirror circuit to provide the program-
mable source current (see CMOS DAC Application Guide,
Publication No. G872-30-10/84, for suitable current mirror cir-
cuit). As before the absolute value of the source current will be
affected by the
±
0.2% tolerance on V
REF
. In this case the per-
formance of the current mirror will also affect the value of the
source current.
FUNCT ION GE NE RAT OR WIT H PROGRAMMABLE
FRE QUE NC Y
Figure 11 shows how the AD7245A/AD7248A with the AD537,
voltage-to-frequency converter and the AD639, trigonometric
function generator to provide a complete function generator
with programmable frequency. T he circuit provides square
wave, triwave and sine wave outputs, each output of
±
10 V
amplitude.
T he AD7245A/AD7248A provides a programmable voltage to
the AD537 input. Since both the AD7245A/AD7248A and
AD537 are guaranteed monotonic, the output frequency will al-
ways increase with increasing digital code. T he AD537 provides
a square wave output which is conditioned for
±
10 V by ampli-
fier A1. T he AD537 also provides a differential triwave output.
T his is conditioned by amplifiers A2 and A3 to provide the
±
1.8 V triwave required at the input of the AD639. T he triwave
is further scaled by amplifier A4 to provide a
±
10 V output.
Adjusting the triwave applied to the AD639 adjust the distortion
performance of the sine wave output, (+10 V in configuration
shown). Amplitude, offset and symmetry of the triwave can af-
fect the distortion. By adjusting these, via VR1 and VR2, an
output sine wave with harmonic distortion of better than –50 dB
can be achieved at low and intermediate frequencies.
Using the capacitor value shown in Figure 11 for C
F
(i.e.,
680 pF) the output frequency range is 0 to 100 kHz over the
digital input code range. T he step size for frequency increments
is 25 Hz. T he accuracy of the output frequency is limited to 8 or
9 bits by the AD537, but is guaranteed monotonic to 12 bits.
MICROPROCE SSOR INT E RFACING—AD7245
AD7245A—8086A INT E RFACE
Figure 12 shows the 8086 16-bit processor interfacing to the
AD7245A. In the setup shown the double buffering feature of
the DAC is not used and the
LDAC
input is tied LOW. AD0–
AD11 of the 16-bit data bus are connected to the AD7245A
data bus (DB0-DB11). T he 12-bit word is written to the
AD7245A in one MOV instruction and the analog output re-
sponds immediately. In this example the DAC address is D000.
A software routine for Figure 12 is given in T able V.
Figure 12. AD7245A to 8086 Interface
Figure 11. Programmable Function Generator
T able V. Sample Program for Loading AD7245A from 8086
ASSUME DS: DACLOAD, CS: DACLOAD
DACLOAD SE GME NT AT 000
00 8CC9
MOV CS,
CS
: DEFINE DAT A SEGMENT
REGIST ER
02 8ED9
MOV DS,
CX
: EQUAL T O CODE
SEGMENT REGIST ER
04 BF00D0
0MOV DI,
#D000
: LOAD DI WIT H D000
07 C705
“YZWX ”
MOV MEM, : DAC LOADED WIT H WX YZ
#YZWX
0B EA00 00
0E
00 FF
: CONT ROL IS RET URNED T O
T HE MONIT OR PROGRAM
相关PDF资料
PDF描述
AD7248ABR LC2MOS 12-Bit DACPORTs
AD7248ATQ LC2MOS 12-Bit DACPORTs
AD7248JN CAP CERM 15000PF 50V X7R 10%0805
AD7248JP CAPACITOR, 0805 33NF 50V CAPACITOR, 0805 33NF 50V; CAPACITANCE:33000PF; VOLTAGE RATING, DC:50V; CAPACITOR DIELECTRIC TYPE:CERAMIC MULTI-LAYER; SERIES:B37941; TOLERANCE, :10%; TOLERANCE, -:10%; TEMP, OP. MAX:125(DEGREE C); TEMP, OP. RoHS Compliant: Yes
AD7245 LC2MOS 12-Bit DACPORT
相关代理商/技术参数
参数描述
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