参数资料
型号: AD737ARZ
厂商: Analog Devices Inc
文件页数: 14/24页
文件大小: 0K
描述: IC TRUE RMS/DC CONV LP 8SOIC
产品培训模块: Introduction to Analog RMS-to-DC Technology: Converters and Applications
标准包装: 1
电流 - 电源: 170µA
电源电压: 2.8V,-3.2V ~ ±16.5V
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SO
包装: 管件
配用: AD737-EVALZ-ND - BOARD EVALUATION FOR AD737

AD737
APPLICATIONS INFORMATION
Data Sheet
RMS MEASUREMENT—CHOOSING AN OPTIMUM
VALUE FOR C AV
Because the external averaging capacitor, C AV , holds the rec-
tified input signal during rms computation, its value directly
VIN RMS
1M?
1 C C
2 V IN
3
COM 8
AD737 7
+V S
6
OUT
+2.5V
VOUT DC
affects the accuracy of the rms measurement, especially at low
frequencies. Furthermore, because the averaging capacitor is
connected across a diode in the rms core, the averaging time
constant (τ AV ) increases exponentially as the input signal
decreases. It follows that decreasing the input signal decreases
4 –V
5
S C AV
33μF
NTR4501NT1
33μF
rms
AVG
ASSUMED TO
BE A LOGIC
SOURCE
F L =
1
2 π × 8000 × C C ( in Farads )
errors due to nonideal averaging but increases the settling time
approaching the decreased rms-computed dc value. Thus,
diminishing input values allow the circuit to perform better
(due to increased averaging) while increasing the waiting time
between measurements. A trade-off must be made between
computational accuracy and settling time when selecting C AV .
RAPID SETTLING TIMES VIA THE AVERAGE
RESPONDING CONNECTION
Because the average responding connection shown in Figure 25
does not use an averaging capacitor, its settling time does not vary
with input signal level; it is determined solely by the RC time
constant of C F and the internal 8 k? output scaling resistor.
–2.5V
Figure 26. CMOS Switch Is Used to Select RMS or Average Responding Modes
SELECTING PRACTICAL VALUES FOR CAPACITORS
Table 6 provides practical values of C AV and C F for several
common applications.
The input coupling capacitor, C C , in conjunction with the 8 k?
internal input scaling resistor, determines the ?3 dB low frequency
roll-off. This frequency, F L , is equal to
(1)
Note that, at F L , the amplitude error is approximately ?30%
C C
1
8 k?
AD737
8
COM
(?3 dB) of reading. To reduce this error to 0.5% of reading,
choose a value of C C that sets F L at one-tenth of the lowest
frequency to be measured.
V IN
POWER
DOWN
2
3
INPUT
AMPLIFIER
BIAS
SECTION
FULL-WAVE
RECTIFIER
8k?
7 +V S
6
OUTPUT
+
C F
33μF
V OUT
In addition, if the input voltage has more than 100 mV of dc
offset, the ac coupling network at Pin 2 is required in addition
to Capacitor C C .
SCALING INPUT AND OUTPUT VOLTAGES
–V S 4
RMS
CORE
5
C AV
The AD737 is an extremely flexible device. With minimal
external circuitry, it can be powered with single- or dual-
polarity power supplies, and input and output voltages are
POSITIVE SUPPLY
COMMON
0.1μF
+V S
independently scalable to accommodate nonmatching I/O
devices. This section describes a few such applications.
0.1μF
NEGATIVE SUPPLY –V S
Figure 25. AD737 Average Responding Circuit
Selectable Average or RMS Conversion
For some applications, it is desirable to be able to select between
rms-value-to-dc conversion and average-value-to-dc conversion.
If C AV is disconnected from the root-mean core, the AD737 full-
wave rectifier is a highly accurate absolute value circuit. A CMOS
switch whose gate is controlled by a logic level selects between
average and rms values.
Extending or Scaling the Input Range
For low supply voltage applications, the maximum peak voltage
to the device is extended by simply applying the input voltage to
Pin 1 across the internal 8 k? input resistor. The AD737 input
circuit functions quasi-differentially, with a high impedance
FET input at Pin 2 (noninverting) and a low impedance input at
Pin 1 (inverting, see Figure 25). The internal 8 k? resistor behaves
as a voltage-to-current converter connected to the summing
node of a feedback loop around the input amplifier. Because the
feedback loop acts to servo the summing node voltage to match
the voltage at Pin 2, the maximum peak input voltage increases
until the internal circuit runs out of headroom, approximately
double for a symmetrical dual supply.
Rev. I | Page 14 of 24
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