参数资料
型号: AD7492ARUZ-4
厂商: Analog Devices Inc
文件页数: 7/24页
文件大小: 0K
描述: IC ADC 12BIT REF/CLOCK 24TSSOP
标准包装: 62
位数: 12
采样率(每秒): 400k
数据接口: 并联
转换器数目: 1
功率耗散(最大): 16.5mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 24-TSSOP
包装: 管件
输入数目和类型: 1 个单端,单极
配用: EVAL-AD7492CBZ-ND - BOARD EVALUATION FOR AD7492
AD7492
Rev. A | Page 15 of 24
BUSY
CS
RD
DBx
CONVST
t10
t9
t3
t4
t5
t8
t6
t7
tCONVERT
t2
01
12
8-
0
19
Figure 19. Parallel Port Timing
CONVST
BUSY
DBx
tCONVERT
t2
t9
DATA N
DATA N+1
01
12
8-
0
20
Figure 20. Parallel Port Timing with CS and RD Tied Low
Mode 2 (Partial or Full Sleep Mode)
Figure 21 shows the AD7492 in Mode 2 operation where the
ADC goes into either partial or full sleep mode after
conversion. The CONVST line is brought low to initiate a
conversion and remains low until after the end of the
conversion. If CONVST goes high and low again while BUSY is
high, the conversion is restarted. Once the BUSY line goes from
high-to-low, the CONVST line has its status checked and, if low,
the part enters a sleep mode. The type of sleep mode the
AD7492 enters depends on what way the PS/FS pin is
hardwired. If the PS/FS pin is tied high, the AD7492 enters
partial sleep mode. If the PS/FS pin is tied low, the AD7492
enters full sleep mode.
The device wakes up again on the rising edge of the CONVST
signal. From partial sleep the AD7492 is capable of starting
conversions typically 1 μs after the rising edge of CONVST. The
CONVST line can go from high-to-low during the wake-up time,
but the conversion is still not initiated until after 1 μs. It is
recommended that the conversion should not be initiated until at
least 20 μs of the wake-up time has elapsed. This ensures that the
AD7492 has stabilized to within 0.5 LSB of the analog input value.
After 1 μs, the AD7492 has only stabilized to within approxi-
mately 3 LSB of the input value. From full sleep, this wake-up
time is typically 500 μs. In all cases the BUSY line only goes high
once CONVST goes low. Superior power performance can be
achieved in these modes of operation by waking up the AD7492
only to carry out a conversion. The optimum power performance
is obtained when using full sleep mode as the ADC comparator,
reference buffer, and reference circuit are powered down. While
in partial sleep mode, only the ADC comparator is powered
down and the reference buffer is put into a low power mode. The
100 nF capacitor on the REF OUT pin is kept charged up by the
reference buffer in partial sleep mode while in full sleep mode
this capacitor slowly discharges. This explains why the wake-up
time is shorter in partial sleep mode. In both sleep modes the
clock oscillator circuit is powered down.
相关PDF资料
PDF描述
VI-23Y-MV-F2 CONVERTER MOD DC/DC 3.3V 99W
MS3126P12-10PZ CONN PLUG 10POS STRAIGHT W/PINS
AD7714YRU-REEL7 IC ADC 24BIT SIGMA-DELTA 24TSSOP
VI-23Y-MV-F1 CONVERTER MOD DC/DC 3.3V 99W
MS3126P12-10PY CONN PLUG 10POS STRAIGHT W/PINS
相关代理商/技术参数
参数描述
AD7492ARUZ-41 制造商:AD 制造商全称:Analog Devices 功能描述:1.25 MSPS, 16 mW Internal REF and CLK, 12-Bit Parallel ADC
AD7492ARUZ-4REEL 功能描述:IC ADC 12BIT REF/CLOCK 24TSSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:16 采样率(每秒):45k 数据接口:串行 转换器数目:2 功率耗散(最大):315mW 电压电源:模拟和数字 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SOIC(0.295",7.50mm 宽) 供应商设备封装:28-SOIC W 包装:带卷 (TR) 输入数目和类型:2 个单端,单极
AD7492ARUZ-4REEL1 制造商:AD 制造商全称:Analog Devices 功能描述:1.25 MSPS, 16 mW Internal REF and CLK, 12-Bit Parallel ADC
AD7492ARUZ-4REEL7 功能描述:IC ADC 12BIT REF/CLOCK 24TSSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:16 采样率(每秒):45k 数据接口:串行 转换器数目:2 功率耗散(最大):315mW 电压电源:模拟和数字 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SOIC(0.295",7.50mm 宽) 供应商设备封装:28-SOIC W 包装:带卷 (TR) 输入数目和类型:2 个单端,单极
AD7492ARUZ-4REEL71 制造商:AD 制造商全称:Analog Devices 功能描述:1.25 MSPS, 16 mW Internal REF and CLK, 12-Bit Parallel ADC