参数资料
型号: AD7523JN
厂商: HARRIS SEMICONDUCTOR
元件分类: DAC
英文描述: 8-Bit, Multiplying D/A Converters
中文描述: PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, PDIP16
文件页数: 5/9页
文件大小: 99K
代理商: AD7523JN
10-12
Unipolar Binary Operation - AD7533 (10-Bit DAC)
The circuit configuration for operating the AD7533 in
unipolar mode is shown in Figure 2. With positive and
negative V
REF
values the circuit is capable of 2-Quadrant
multiplication. The “Digital Input Code/Analog Output Value”
table for unipolar mode is given in Table 2.
Zero Offset Adjustment
1. Connect all digital inputs to GND.
2. Adjust the offset zero adjust trimpot of the output
operational amplifier for 0V
±
1mV (Max) at V
OUT
.
Gain Adjustment
1. Connect all digital inputs to V+.
2. Monitor V
OUT
for a -V
REF
(1 - 1/2
10
) reading.
3. To increase V
OUT
, connect a series resistor, R2, (0
to
250
) in the I
OUT1
amplifier feedback loop.
4. To decrease V
OUT
, connect a series resistor, R1, (0
to
250
) between the reference voltage and the V
REF
terminal.
Bipolar (Offset Binary) Operation - AD7523
The circuit configuration for operating the AD7523 in the
bipolar mode is given in Figure 3. Using offset binary digital
input codes and positive and negative reference voltage
values, Four-Quadrant multiplication can be realized. The
“Digital Input Code/Analog Output Value” table for bipolar
mode is given in Table 3.)
A “Logic 1” input at any digital input forces the corresponding
ladder switch to steer the bit current to I
OUT1
bus. A “Logic
0” input forces the bit current to I
OUT2
bus. For any code the
I
OUT1
and I
OUT2
bus currents are complements of one
another. The current amplifier at I
OUT2
changes the polarity
of I
OUT2
current and the transconductance amplifier at I
OUT
output sums the two currents. This configuration doubles the
output range. The difference current resulting at zero offset
binary code, (MSB = “Logic 1”, all other bits = “Logic 0”), is
corrected by suing an external resistor, (10M
), from V
REF
to I
OUT2
(Figure 3).
TABLE 2. UNlPOLAR BINARY CODE - AD7533
DIGITAL INPUT
MSB
LSB
(NOTE 1)
NOMINAL ANALOG OUTPUT
1111111111
1000000001
1000000000
0111111111
0000000001
0000000000
NOTES:
1. V
OUT
as shown in the Functional Diagram.
2. Nominal Full Scale for the circuit of Figure 2 is given by:
.
3. Nominal LSB magnitude for the circuit of Figure 2 is given by:
.
V
REF
------------
V
REF
------------
VREF
------------
V
--------------
=
V
REF
------------
V
REF
------------
V
REF
------------
0
=
FS
VREF
------------
=
LSB
VREF
------------
=
TABLE 3. BlPOLAR (OFFSET BINARY) CODE - AD7523
DIGITAL INPUT
MSB
LSB
ANALOG OUTPUT
11111111
10000001
10000000
0
01111111
00000001
00000000
NOTE:
1.
.
VREF
---------
VREF
---------
+VREF
---------
+VREF
---------
+VREF
---------
1 LSB
27
(
)
VREF
(
)
---------
VREF
(
)
=
=
I
OUT2
6
+
R
FEEDBACK
6
+
-
I
OUT1
CR1
15
16
1
4
13
3
2
AD7523/
AD7533
MSB
LSB
14
+15V
V
REF
DATA
INPUTS
±
10V
R3 5K
R4 5K
V
OUT
R2
CR2
R1
R6 10M
FIGURE 3. BIPOLAR OPERATION (4-QUADRANT MULTIPLICATION)
-
AD7523, AD7533
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