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参数资料
| 型号： | AD7538KRZ-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 4/16页 |
| 文件大小： | 0K |
| 描述： | IC DAC 14BIT W/BUFF 24-SOIC |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 产品变化通告： | Product Discontinuance 27/Oct/2011 |
| 标准包装： | 1,000 |
| 设置时间： | 1.5µs |
| 位数： | 14 |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 电压电源： | 单电源 |
| 功率耗散（最大）： | 1W |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 24-SOIC W |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 1 电流，单极；1 电流，双极 |
| 采样率（每秒）： | 667k |
AD7538
Rev. B | Page 12 of 16
PROGRAMMABLE GAIN AMPLIFIER
The circuit shown in Figure 9 provides a programmable gain
amplifier (PGA). In it the DAC behaves as a programmable
resistance and thus allows the circuit gain to be digitally
controlled.
AD7538
N
IOUT
VDD
VSS
VOUT
VIN
VREF
GND
DIGITAL
INPUT
A
RFB
NOTES
1. RESISTOR RFB IS ACTUALLY
INCLUDED ON THE DICE.
01
13
9-
00
9
Figure 9. Programmable Gain Amplifier (PGA)
The transfer function of Figure 9 is:
FB
EQ
IN
OUT
R
V
Gain
=
(1)
REQ is the equivalent transfer impedance of the DAC from the
VREF pin to the IOUT pin and can be expressed as
N
R
IN
n
EQ
2
=
(2)
where:
n
is the resolution of the DAC.
N
is the DAC input code in decimal.
RIN
is the constant input impedance of the DAC (RIN = RLAD).
Substituting this expression into Equation 1 and assuming
zero gain error for the DAC (RIN = RFB), the transfer function
simplifies to
N
V
n
IN
OUT
2
=
(3)
The ratio N/2n is commonly represented by the term, D, and, as
such, is the fractional representation of the digital input word.
D
N
V
n
IN
OUT
1
2
=
=
(4)
Equation 4 indicates that the gain of the circuit can be varied
from 16,384 down to unity (actually 16,384/16,383) in 16,383
steps. The all 0s code is never applied. This avoids an open-loop
condition thereby saturating the amplifier. With the all 0s code
excluded there remains (2n – 1) possible input codes allowing a
choice of (2n – 1) output levels. In decibels the dynamic range is
(
)
dB
84
1
2
log
20
log
20
10
=
=
n
IN
OUT
V
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