参数资料
型号: AD7610BSTZ-RL
厂商: Analog Devices Inc
文件页数: 20/32页
文件大小: 0K
描述: IC ADC 16BIT 250KSPS 48-LQFP
标准包装: 2,000
系列: PulSAR®
位数: 16
采样率(每秒): 250k
数据接口: 串行,并联
转换器数目: 1
功率耗散(最大): 110mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-LQFP(7x7)
包装: 带卷 (TR)
输入数目和类型: 1 个差分,单极;1 个差分,双极
Data Sheet
AD7610
Rev. A | Page 27 of 32
External Clock Data Read After/During Conversion
It is also possible to begin to read data after conversion and
continue to read the last bits after a new conversion has been
initiated. This method allows the full throughput and the use of
a slower SDCLK frequency. Again, it is recommended to use a
discontinuous SDCLK whenever possible to minimize potential
incorrect bit decisions. For the different modes, the use of a slower
SDCLK such as 20 MHz in warp mode, 15 MHz in normal mode
and 13 MHz in impulse mode can be used.
SDIN
SDOUT
D0
1
2
3
15
16
BUSY
EXT/INT = 1
INVSCLK = 0
CS
SDCLK
4
D2
D1
17
18
SER/PAR = 1
RD = 0
14
D15
D14
D13
X15
X14
19
X0
X2
X1
X15
X14
X13
Y15
Y14
t31
X*
t32
t16
t33
t34
t37
t35
t36
*A DISCONTINUOUS SDCLK IS RECOMMENDED.
06
39
5-
0
42
Figure 42. Slave Serial Data Timing for Reading (Read After Convert)
SDOUT
D0
12
3
BUSY
EXT/INT = 1
INVSCLK = 0
CS
SDCLK
15
D1
SER/PAR = 1
RD = 0
16
D15
D14
DATA = SDIN
t31
t32
t16
t37
t35
t36
CNVST
X*
t27
*A DISCONTINUOUS SDCLK IS RECOMMENDED.
06
39
5-
04
3
Figure 43. Slave Serial Data Timing for Reading (Read Previous Conversion During Convert)
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