参数资料
型号: AD7623ACPZRL
厂商: Analog Devices Inc
文件页数: 19/28页
文件大小: 0K
描述: IC ADC 16BIT 1.33MSPS 48LFCSP
标准包装: 2,500
系列: PulSAR®
位数: 16
采样率(每秒): 1.33M
数据接口: 串行,并联
转换器数目: 1
功率耗散(最大): 55mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-VFQFN 裸露焊盘,CSP
供应商设备封装: 48-LFCSP-VQ(7x7)
包装: 带卷 (TR)
输入数目和类型: 1 个差分,双极
配用: EVAL-AD7623CBZ-ND - BOARD EVALUATION FOR AD7623
AD7623
Rev. 0 | Page 26 of 28
MICROPROCESSOR INTERFACING
The AD7623 is ideally suited for traditional dc measurement
applications supporting a microprocessor, and ac signal
processing applications interfacing to a digital signal processor.
The AD7623 is designed to interface with a parallel 8-bit or
16-bit wide interface, or with a general-purpose serial port or
I/O ports on a microcontroller. A variety of external buffers can
be used with the AD7623 to prevent digital noise from coupling
into the ADC. The SPI Interface (ADSP-219x) section shows
the use of the AD7623 with an ADSP-219x SPI-equipped DSP.
SPI Interface (ADSP-219x)
Figure 42 shows an interface diagram between the AD7623 and
an SPI-equipped DSP, ADSP-219x. To accommodate the slower
speed of the DSP, the AD7623 acts as a slave device, and data
must be read after conversion. This mode also allows the daisy-
chain feature. The convert command could be initiated in
response to an internal timer interrupt.
The reading process can be initiated in response to the end-of-
conversion signal (BUSY going low) using an interrupt line of
the DSP. The serial peripheral interface (SPI) on the ADSP-219x
is configured for master mode (MSTR) = 1, clock polarity bit
(CPOL) = 0, clock phase bit (CPHA) = 1, and SPI interrupt
enable (TIMOD) = 00 by writing to the SPI control register
(SPICLTx).
It should be noted that to meet all timing requirements, the SPI
clock should be limited to 17 Mb/s allowing it to read an ADC
result in less than 1 μs. When a higher sampling rate is desired,
use one of the parallel interface modes.
05574-042
BUSY
CS
SDOUT
SCLK
CNVST
AD7623*
PFx
SPIxSEL (PFx)
MISOx
SCKx
PFx OR TFSx
ADSP-219x*
*ADDITIONAL PINS OMITTED FOR CLARITY
DVDD
SER/PAR
EXT/INT
RD
INVSCLK
Figure 42. Interfacing the AD7623 to SPI Interface
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