参数资料
型号: AD7674ACPZRL
厂商: Analog Devices Inc
文件页数: 9/28页
文件大小: 0K
描述: IC ADC 18BIT SAR 5V 48LFCSP
产品培训模块: ADC Applications
ADC Architectures
ADC DC/AC Performance
标准包装: 2,500
系列: PulSAR®
位数: 18
采样率(每秒): 800k
数据接口: 串行,并联
转换器数目: 1
功率耗散(最大): 138mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-VFQFN 裸露焊盘,CSP
供应商设备封装: 48-LFCSP-VQ(7x7)
包装: 带卷 (TR)
输入数目和类型: 1 个差分,双极
配用: EVAL-AD7674CBZ-ND - BOARD EVALUATION FOR AD7674
AD7674
Rev. A | Page 17 of 28
Transfer Functions
Except in 18-bit interface mode, the AD7674 offers straight
binary and twos complement output coding when using OB/2C.
See Figure 26 and Table 8 for the ideal transfer characteristic.
000...000
000...001
000...010
111...101
111...110
111...111
ANALOG INPUT
+FS – 1.5 LSB
+FS – 1 LSB
–FS + 1 LSB
–FS
–FS + 0.5 LSB
ADC
CODE
(S
tra
ight
Bina
ry
)
03083-0-026
Figure 26. ADC Ideal Transfer Function
Table 8. Output Codes and Ideal Input Voltages
Description
Analog Input
VREF = 4.096 V
Straight
Binary
(Hex)
Twos
Complement
(Hex)
FSR – 1 LSB
4.095962 V
3FFFF1
1FFFF1
FSR – 2 LSB
4.095924 V
3FFFE
1FFFE
Midscale + 1 LSB
31.25 μV
20001
00001
Midscale
0 V
20000
00000
Midscale – 1 LSB
–31.25 μV
1FFFF
3FFFF
–FSR + 1 LSB
–4.095962 V
00001
20001
–FSR
–4.096 V
000002
200002
1 This is also the code for overrange analog input (VIN+ – VIN–
above VREF – VREFGND).
2 This is also the code for underrange analog input (VIN+ – VIN–
below –VREF + VREFGND).
AVDD
AGND
DGND
DVDD
OVDD
OGND
CNVST
BUSY
SDOUT
SCLK
RD
CS
RESET
PD
2.5V REF
NOTE 1
REFBUFIN
20
Ω
D
CLOCK
AD7674
μC/μP/DSP
SERIAL PORT
DIGITAL SUPPLY
(3.3V OR 5V)
ANALOG
SUPPLY
(5V)
DVDD
OB/2C
NOTE 6
PDBUF
DVDD
50k
Ω
100nF
1M
Ω
IN+
ANALOG INPUT+
CC
2.7nF
U1
NOTE 3
NOTE 4
50
Ω
AD8021
+
15
Ω
NOTE 2
NOTE 5
ADR421
10
μF
100nF
+
10
μ F
100nF
+
100nF
+
10
μ F
IN–
ANALOG INPUT–
CC
2.7nF
U2
NOTE 3
NOTE 4
50
Ω
AD8021
+
15
Ω
50
Ω
100nF
NOTES
1. SEE VOLTAGE REFERENCE INPUT SECTION.
2. OPTIONAL CIRCUITRY FOR HARDWARE GAIN CALIBRATION.
3.THE AD8021 IS RECOMMENDED. SEE DRIVER AMPLIFIER CHOICE SECTION.
4. SEE ANALOG INPUTS SECTION.
5. OPTION, SEE POWER SUPPLY SECTION.
6. OPTIONAL LOW JITTER CNVST, SEE CONVERSION CONTROL SECTION.
47
μF
MODE1
MODE0
NOTE 1
CREF
REF
REFGND
03083-0-027
Figure 27. Typical Connection Diagram (Internal Reference Buffer, Serial Interface)
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