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参数资料
| 型号： | AD7678ACPZRL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 11/28页 |
| 文件大小： | 0K |
| 描述： | IC ADC 18BIT SAR W/BUFF 48LFCSP |
| 标准包装： | 2,500 |
| 系列： | PulSAR® |
| 位数： | 18 |
| 采样率（每秒）： | 100k |
| 数据接口： | 串行，并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 26mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 48-LFCSP-VQ（7x7） |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 1 个差分，双极 |
| 配用： | EVAL-AD7678CB-ND - BOARD EVALUATION FOR AD7678 |
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AD7678
Rev. A | Page 19 of 28
POWER DISSIPATION VERSUS THROUGHPUT
The AD7678 automatically reduces its power consumption at
the end of each conversion phase. During the acquisition phase,
the operating currents are very low, which allows for a signifi-
cant power savings when the conversion rate is reduced, as
shown in Figure 26. This feature makes the AD7678 ideal for
very low power battery applications.
It should be noted that the digital interface remains active even
during the acquisition phase. To reduce the operating digital
supply currents even further, the digital inputs need to be
driven close to the power rails (DVDD and DGND), and
OVDD should not exceed DVDD by more than 0.3 V.
SAMPLING RATE (SPS)
POW
E
R
D
ISSIPA
TION
(
m
W
)
100000
10000
1000
100
10
1
0.1
100k
10k
1k
100
1
10
PDBUF HIGH
03084-0-032
Figure 26. Power Dissipation vs. Sample Rate
CONVERSION CONTROL
Figure 27 shows the detailed timing diagrams of the conversion
process. The AD7678 is controlled by the CNVST signal, which
initiates conversion. Once initiated, it cannot be restarted or
aborted, even by the power-down input PD, until the
conversion is complete. The CNVST signal operates
independently of the CS and RD signals.
CNVST
t1
t2
MODE
ACQUIRE
CONVERT
ACQUIRE
CONVERT
t7
t8
BUSY
t4
t3
t5
t6
03084-0-033
Figure 27. Basic Conversion Timing
Although CNVST is a digital signal, it should be designed with
special care with fast, clean edges and levels with minimum
overshoot and undershoot or ringing.
For other applications, conversions can be automatically
initiated. If CNVST is held low when BUSY is low, the AD7678
controls the acquisition phase and then automatically initiates a
new conversion. By keeping CNVST low, the AD7678 keeps the
conversion process running by itself. It should be noted that the
analog input has to be settled when BUSY goes low. Also, at
power-up, CNVST should be brought low once to initiate the
conversion process. In this mode, the AD7678 could sometimes
run slightly faster than the guaranteed limits of 100 kSPS.
t9
RESET
DATA
BUS
BUSY
CNVST
t8
03084-0-034
Figure 28. RESET Timing
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| AD7678ASTZRL | IC ADC 18BIT SAR 100KSPS 48-LQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD7678AST | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 18-bit Parallel/Serial 48-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:18-BIT, 100KSPS SAR ADC - Bulk 制造商:Analog Devices 功能描述:18BIT SAR ADC SMD 7678 LQFP48 |
| AD7678ASTRL | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 18-bit Parallel/Serial 48-Pin LQFP T/R 制造商:Analog Devices 功能描述:ADC SGL SAR 100KSPS 18BIT PARALLEL/SERL 48LQFP - Tape and Reel |
| AD7678ASTZ | 功能描述:IC ADC 18BIT SAR 100KSPS 48-LQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:PulSAR® 其它有关文件:TSA1204 View All Specifications 标准包装:1 系列:- 位数:12 采样率（每秒）:20M 数据接口:并联 转换器数目:2 功率耗散（最大）:155mW 电压电源:模拟和数字 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-TQFP 供应商设备封装:48-TQFP（7x7） 包装:Digi-Reel® 输入数目和类型:4 个单端，单极；2 个差分，单极 产品目录页面:1156 (CN2011-ZH PDF) 其它名称:497-5435-6 |
| AD7678ASTZ | 制造商:Analog Devices 功能描述:18BIT SAR ADC SMD 7678 LQFP48 |
| AD7678ASTZRL | 功能描述:IC ADC 18BIT SAR 100KSPS 48-LQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:PulSAR® 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
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