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| 型号： | AD7691BCPZRL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 7/28页 |
| 文件大小： | 0K |
| 描述： | IC ADC 18BIT SAR 250KSPS 10LFCSP |
| 标准包装： | 5,000 |
| 系列： | PulSAR® |
| 位数： | 18 |
| 采样率（每秒）： | 250k |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 12.5mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-WFDFN 裸露焊盘，CSP |
| 供应商设备封装： | 10-LFCSP-WD（3x3） |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 1 个差分，双极 |
| 配用： | EVAL-AD7691CBZ-ND - BOARD EVALUATION FOR AD7691CBZ |
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Data Sheet
AD7691
Rev. C | Page 15 of 28
TYPICAL CONNECTION DIAGRAM
Figure 29 shows an example of the recommended connection diagram for the AD7691 when multiple supplies are available.
AD7691
REF
GND
VDD
IN–
IN+
VIO
SDI
SCK
SDO
CNV
3- OR 4-WIRE INTERFACE5
100nF
5V
10F2
V+
V–
1.8V TO VDD
REF1
0 TO VREF
15
2.7nF
4
V+
V–
VREF TO 0
15
2.7nF
ADA4841-23
4
1 SEE VOLTAGE REFERENCE INPUT SECTION FOR REFERENCE SELECTION.
2 CREF IS USUALLY A 10F CERAMIC CAPACITOR (X5R).
3 SEE TABLE 9 FOR ADDITIONAL RECOMMENDED AMPLIFIERS.
4 OPTIONAL FILTER. SEE ANALOG INPUT SECTION.
5 SEE THE DIGITAL INTERFACE SECTION FOR MOST CONVENIENT INTERFACE MODE.
06
14
6-
0
08
Figure 29. Typical Application Diagram with Multiple Supplies
ANALOG INPUTS
Figure 30 shows an equivalent circuit of the input structure of
the AD7691.
The two diodes, D1 and D2, provide ESD protection for the
analog inputs, IN+ and IN. Care must be taken to ensure that
the analog input signal does not exceed the supply rails by more
than 0.3 V because this causes the diodes to become forward
biased and start conducting current. These diodes can handle a
forward-biased current of 130 mA maximum. For instance,
these conditions could eventually occur if the input buffer (U1)
supplies are different from VDD. In such a case (for example, an
input buffer with a short circuit), the current limitation can be
used to protect the part.
CIN
RIN
D1
D2
CPIN
IN+
OR IN–
GND
VDD
06
14
6-
00
7
Figure 30. Equivalent Analog Input Circuit
The analog input structure allows the sampling of the true
differential signal between IN+ and IN. By using these
differential inputs, signals common to both inputs are rejected.
During the acquisition phase, the impedance of the analog
inputs (IN+ and IN) can be modeled as a parallel combination
of the capacitor, CPIN, and the network formed by the series
connection of RIN and CIN. CPIN is primarily the pin capacitance.
RIN is typically 3 kΩ and is a lumped component composed of
serial resistors and the on resistance of the switches. CIN is
typically 30 pF and is mainly the ADC sampling capacitor.
During the conversion phase, where the switches are opened,
the input impedance is limited to CPIN. RIN and CIN make a
1-pole, low-pass filter that reduces undesirable aliasing effects
and limits noise.
When the source impedance of the driving circuit is low, the
AD7691 can be driven directly. Large source impedances
significantly affect the ac performance, especially total harmonic
distortion (THD). The dc performances are less sensitive to
the input impedance. The maximum source impedance
depends on the amount of THD that can be tolerated.
The THD degrades as a function of the source impedance and
the maximum input frequency as shown in Figure 31.
06
14
6-
0
09
FREQUENCY (kHz)
T
HD
(
d
B
)
09
–130
–125
–120
–115
–110
–105
–100
–95
–90
–85
–80
10
20
30
40
50
60
70
80
0
33
100
15
VREF = VDD 5V
250
50
Figure 31. THD vs. Analog Input Frequency and Source Resistance
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